Defect-tolerant demultiplexers for nano-electronics constructed from error-correcting codes

Abstract

We present a defect-tolerant methodology for the interconnect from conventional microelectronics to nano-electronic circuits. A relatively small amount of redundancy is added to a conventional demultiplexer that enables a specific element in an array of nano-wires to be addressed even if one or more connections to that nano-wire are defective. The k-bit address for each nano-wire is extended to a k+s-bit address by appending s check bits generated by an encoder. We demonstrate a systematic strategy for selecting effective encoding functions, based on error-correcting codes commonly used for digital data transmission. Small numbers of redundant address wires can provide significant protection from fabrication errors at the nano-scale in order to attain desired manufacturing yields. This coding gain can translate into significant economic gains in manufacturing costs.