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Segmented Drain Engineered Tunnel Field Effect Transistor for Suppression of Ambipolarity

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Abstract

In this paper, a new Si0.6Ge0.4/Si heterostructure tunneling field-effect transistor with segmented drain (SiGe/Si SD TFET) is proposed and simulated by Silvaco ATLAS simulator. The drain segmentation increases the tunneling barrier width at the drain/channel interface and hence reduces ambipolar current (Iamb) considerably. Moreover, the amalgam of Si0.6Ge0.4 source and silicon channel allows much improved On-state current (Ion) with lower Off-state leakage current (Ioff). The presence of high bandgap silicon material keeps the lower recombination rate of the carriers in the channel region, thus provides a much higher Ion/Ioff ratio of 5.64 × 1011. The segmented drain exhibits more than 4-decades improvement in Iamb without affecting Ion and Ioff. The thickness and doping profile of the segmented drain region are calibrated to achieve a higher Ion/Iamb ratio of 3.29 × 109 with an average subthreshold swing (SS) of 42 mV/decade. The investigation is further extended by considering the interface trap charges (ITCs) at the HfO2/Si interface for different positive and negative density values.

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Authors and Affiliations

  1. Department of Electronics & Communication Engineering, Institute of Technical Education & Research, Siksha ’O’ Anusandhan Deemed to be University, Bhubaneswar, India

    Sidhartha Dash & Saumendra Kumar Mohanty

  2. Department of Electronics & Communication Engineering, National Institute Technology Raipur, Raipur, Chhattisgarh, India

    Guru Prasad Mishra

Authors
  1. Sidhartha Dash
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  2. Saumendra Kumar Mohanty
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  3. Guru Prasad Mishra
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Contributions

Sidhartha Dash has theoretically developed the model and was a major contributor in writing the manuscript. Saumendra Kumar Mohanty has simulated the model. Guru Prasad Mishra has contributed to the analysis of the results. All authors read and approved the final manuscript.

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Correspondence to Guru Prasad Mishra.

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Dash, S., Mohanty, S.K. & Mishra, G.P. Segmented Drain Engineered Tunnel Field Effect Transistor for Suppression of Ambipolarity. Silicon 14, 1671–1682 (2022). https://doi.org/10.1007/s12633-021-00973-0

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  • DOI: https://doi.org/10.1007/s12633-021-00973-0

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