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Flip Chip Reliability of GaAs on Si Thinfilm Substrates Using AuSn Solder Bumps

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Abstract

Au/Sn solder bumps are mainly used for flip chip assembly of compound semiconductors in optoelectronic and RF applications. They allow a fluxless assembly which is required to avoid contamination of optical interfaces and the metallurgy is well suited to the final gold metallization on GaAs or InP. Flip chip assembly experiments were carried out using two layer Au/Sn bumps as plated without prior bump reflow. An RF and reliability test vehicles comprise a GaAs chip which was flip chip soldered on a silicon substrate. Temperature cycling tests with and without underfiller were performed. The different failure modes for underfilled and nonunderfilled samples were discussed and compared. Additional reliability tests were performed with flip chip bonding by gold thermocompression for comparison. The test results and the failure modes are discussed in detail.

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Authors and Affiliations

  1. Fraunhofer IZM, Gustav-Meyer-Allee 25, D-13355, Berlin, Germany

    Hermann Oppermann, Matthias Hutter, Matthias Klein, Gunter Engelmann, Michael Toepper & Jürgen Wolf

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  1. Hermann Oppermann
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  2. Matthias Hutter
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  3. Matthias Klein
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  4. Gunter Engelmann
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  5. Michael Toepper
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  6. Jürgen Wolf
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Correspondence to Hermann Oppermann.

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Oppermann, H., Hutter, M., Klein, M. et al. Flip Chip Reliability of GaAs on Si Thinfilm Substrates Using AuSn Solder Bumps. MRS Online Proceedings Library 863, B10.1 (2004). https://doi.org/10.1557/PROC-863-B10.1

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  • DOI: https://doi.org/10.1557/PROC-863-B10.1

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