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A 4 Gsample/s 2 bits flash ADC with 2–4 GHz input bandwidth for radio astronomy applications

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Abstract

This paper presents the design and the measurement results of a high speed A/D converter (ADC or digitizer) developed for radio-astronomy applications and especially for the ALMA (Atacama Large Millimeter Array) project. This monolithic digitizer is implemented in a BiCMOS 0.35 μm SiGe process for high frequency mixed-signal applications. The main characteristics of this circuit are a 2 bits resolution with 3 quantization levels (equivalent to 1.5 bits) with 4 Gsample/s rate, a wide input bandwidth from 2 GHz up to 4 GHz under full Nyquist condition. The adopted digitizer architecture is that of a conventional flash analog to digital converter structure. The overall chip dissipates 652 mW under ± 1.25 V supply and the die area is 5.4 mm2.

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References

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Authors and Affiliations

  1. IXL Laboratory, University of Bordeaux, F-33405, Talence Cedex, France

    Deschans David

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  1. Deschans David
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  2. Begueret Jean-Baptiste
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  3. Deval Yann
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  4. Scarabello Christophe
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  5. Fouillat Pascal
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  6. Montignac Guy
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  7. Baudry Alain
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Correspondence to Deschans David.

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David, D., Jean-Baptiste, B., Yann, D. et al. A 4 Gsample/s 2 bits flash ADC with 2–4 GHz input bandwidth for radio astronomy applications. Analog Integr Circ Sig Process 49, 31–38 (2006). https://doi.org/10.1007/s10470-006-8693-5

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  • DOI: https://doi.org/10.1007/s10470-006-8693-5

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