Skip to main content
SpringerLink
Log in

An On-Chip Spectrum Analyzer for Analog Built-In Testing

  • Published:
Journal of Electronic Testing Aims and scope Submit manuscript

Abstract

This paper presents an analog built-in testing (BIT) architecture and its implementation. It enables the frequency response and harmonic distortion characterizations of an integrated device-under-test (DUT) through a digital off-chip interface. External analog instrumentation is avoided, reducing test time and cost. The proposed on-chip testing scheme uses a digital frequency synthesizer and a simple signal generator synchronized with a switched capacitor bandpass filter. A general methodology for the use of this structure in the functional verification of a DUT is also provided. The circuit-level design and experimental results of an integrated prototype in standard CMOS 0.5 μm technology are presented to demonstrate the feasibility of the proposed BIT technique.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. K. Arabi and B. Kaminska, “Oscillation Built-In Self Test (OBIST) for Functional and Structural Testing of Analog and Mixed-Signal Integrated Circuits,” Proc. Int. Test Conference, 1997, pp. 786–795.

  2. J.L. Ausin, J.F. Duque-Carrillo, G. Torelli and E. Sanchez-Sinencio, “Switched-Capacitor Circuits with Periodical Nonuniform Individual Sampling,” IEEE Trans. on Circuits and Systems II, vol. 50, no. 8, 2003.

  3. F. Balestro, V. Fraisse, G. Martel, D. Morche, P. Senn, G. Le Tourneur, and Y. Mahieux, “A 3-V 0.5-μm CMOS A/D Audio Processor for a Microphone Array,” IEEE Journal of Solid-State Circuits, vol. 32, no. 7, pp. 1122–1126, 1997.

    Google Scholar 

  4. A. Baschirotto, F. Servi, and R. Castello, “A 200-Ms/s 10-mW Switched-Capacitor Filter un 0.5-μ m CMOS Technology,” IEEE Journal Solid-State Circuits, vol. 35, no. 8, pp. 1215–1219, 2000.

    Google Scholar 

  5. A. Bicakci, C.-S Kim, S.-S. Lee, and C. Conroy, “A 700 mW CMOS Line Driver for ADSL Central Office Applications,” Proc. IEEE Int. Solid-State Circuits Conference, pp. 414–503, 2003.

  6. A. Chatterjee, B.C. Kim, and N. Nagi, “DC Built-In Self-Test for Linear Analog Circuits,” IEEE Design & Test of Computers, pp. 26–33, 1996.

  7. B. Dufort and G.W. Roberts, “On-Chip Analog Signal Generation for Mixed-Signal Built-In Self-Test,” IEEE Journal Solid-State Circuits, vol. 34, no. 3, pp. 318–330, 1999.

    Google Scholar 

  8. M.M. Hafed, N. Abaskharoun, G.W. Roberts, “A 4-GHz Effective Sample Rate Integrated Test Core for Analog and Mixed-Signal Circuits,” IEEE Journal Solid-State Circuits, vol. 37, no. 4, pp. 499–514, 2002.

    Google Scholar 

  9. J. Huang and K. Cheng, “A Sigma-Delta Modulation Based BIST Scheme for Mixed-Signal Circuits,” in Proc. IEEE Design Automation Conference, 2000, pp. 605–610.

  10. G. Huertas, D. Vázquez, E.J. Peralías, A. Rueda, and J.L. Huertas, “Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell,” IEEE Design and Test of Computers, vol. 33, no.7, pp. 73–82, 2002.

    Google Scholar 

  11. IEEE Std. 1149.4-1999, IEEE Standard for a Mixed-Signal Test Bus, IEEE, 1999.

  12. D.A. Johns and K. Martin, Analog Integrated Circuit Design, John Wiley & Sons, 1997, pp. 504–507.

  13. U. Kac, F. Novac, F. Azais, P. Nouet, and M. Renovell, “Extending IEEE Std. 1149.4 Analog Boundary Modules to Enhance Mixed-Signal Test,” IEEE Design & Test of Computers, vol. 20, no. 2, pp. 32–39, 2003.

    Google Scholar 

  14. M. Mendez-Rivera, J. Silva-Martinez, and E. Sánchez-Sinencio, “On-Chip Spectrum Analyzer for Built-in Testing Analog ICs,” Proc. of the IEEE Int. Symposium on Circuits and Systems, vol. 5, pp. 61–64, 2003.

    Google Scholar 

  15. L.S. Milor, “A Tutorial Introduction to Research on Analog and Mixed-Signal Circuit Testing,” IEEE Trans. on Circuits and Systems II, vol. 45, no. 10, pp. 1389–1047, 1998.

    Google Scholar 

  16. U.-K. Moon, “CMOS High-Frequency Switched-Capacitor Filters for Telecommunication Applications,” IEEE Journal Solid-State Circuits, vol. 35, no. 2, pp. 212–220, 2000.

    Google Scholar 

  17. S. Nagaraj, “A Parasitic-Insensitive Area-Efficient Approach to Realizing Very large Time Constants in Switched-Capacitor Circuits,” IEEE Trans. on Circuits and Systems II, vol. 36, no. 9, pp. 1210–1216, 1989.

    Google Scholar 

  18. M. Negreiros, L. Carbo and A.A. Susin, “A Statistical Sampler for a New On-Line Analog Test Method,” Journal of Electronic Testing, vol. 19, no. 5, pp. 585–595, 2003.

    Google Scholar 

  19. H.C. Patangia and B. Zenone, “A Programmable Switched-Capacitor Sinewave Generator,” Proc. IEEE Midwest Symposium on Circuits and Systems, vol. 1, pp. 165–168, 1994.

    Google Scholar 

  20. R. Schaumann and M.E. Van Valkenburg, Design of Analog Filters, Oxford University Press, 2001, pp. 697–704.

  21. J. Silva-Martinez and E. Sánchez-Sinencio, “Excess Phase-Jitter Cancellation Method for SC Relaxation Oscillators,” IEEE Transactions on Circuits and Systems-II, vol. 34, no. 6, pp. 695–700, 1987.

    Google Scholar 

  22. M. Steyaert, J. Janssens, B. De Muer, M. Borremans, and N. Itoh, “A 2-V CMOS Cellular Transceiver Front-End,” IEEE Journal Solid-State Circuits, vol. 35, no. 12, pp. 1895–1907, 2000.

    Google Scholar 

  23. A. Valdes-Garcia, J. Silva-Martinez, and E. Sánchez-Sinencio, “An On-Chip Transfer Function Characterization System for Analog Built-in Testing,” in Proc. IEEE VLSI Test Symposium, 2004, pp. 261–266.

  24. A.Y. Valero-Lopez, A. Valdes-Garcia, and E. Sánchez-Sinencio, “Frequency Synthesizer for On-Chip Testing and Automated Tuning,” in Proc. IEEE Int. Symposium on Circuits and Systems, May 2004, pp. 565–568.

  25. P.N. Variyam and A. Chatterjee, “Digital-Compatible BIST for Analog Circuits Using Transient Response Sampling,” IEEE Design & Test of Computers, pp. 106–115, July–Sept. 2000.

Download references

Author information

Authors and Affiliations

  1. Analog & Mixed-Signal Center, Texas A&M University, College Station, TX, 77843-3128, USA

    Marcia G. Méndez-Rivera, Alberto Valdes-Garcia, Jose Silva-Martinez & Edgar Sánchez-Sinencio

Authors
  1. Marcia G. Méndez-Rivera
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Alberto Valdes-Garcia
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Jose Silva-Martinez
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Edgar Sánchez-Sinencio
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Alberto Valdes-Garcia.

Additional information

Marcia G. Mendez-Rivera was born in Irapuato, Mexico in 1972. She received the Communications and Electronics Engineering Degree from the Universidad de Guanajuato, Guanajuato, Mexico. in 1996, the M.Sc. degree from the Instituto Nacional de Astrofisica, Optica y Electronica (INAOE), Puebla, Mexico in 1998 and the M.Sc. from Texas A&M University, College Station in 2002. Her research interest is in the design and fabrication of analog and mixed-signal circuits.

Alberto Valdes-Garcia born in 1978, grew up in San Mateo Atenco, Mexico. He received the B.S. in Electronic Systems Engineering degree from the Monterrey Institute of Technology (ITESM), Campus Toluca, Mexico in 1999 (with honors as the best score from all majors). Since the fall of 2000 he has been working towards the Ph.D. degree at Analog and Mixed-Signal Center (AMSC), Texas A&M University. During the spring and summer of 2000 he was a Design Engineer with Motorola Broadband Communications Sector. In the summer of 2002 he was with the Read Channel Design Group at Agere Systems where he investigated wide tuning range GHz LC VCOs for mass storage applications. During the summer of 2004 he was with the Mixed-Signal Communications IC Design Group at the IBM T. J. Watson Research Center, where worked on design and analysis of SiGe power amplifiers for millimeter wave radios. Since the fall of 2001 he has been a Semiconductor Research Corporation (SRC) research assistant at the AMSC working on the development of analog built-in testing techniques. Since the fall of 2000, Alberto has been the recipient of a scholarship from the Mexican National Council for Science and Technology (CONACYT). He represented Mexico in the 1994 ‘Odyssey of the Mind’ World Creativity Contest and in the 1997 International Exposition for Young Scientists. His present research interests include built-in testing implementations for analog and RF circuits, system level design for wireless receivers and RF circuit design for UltraWideBand (UWB) communications.

Jose Silva-Martinez was born in Tecamachalco, Puebla, México. He received the B.S. degree in electronics from the Universidad Autónoma de Puebla, México, in 1979, the M.Sc. degree from the Instituto Nacional de Astrofísica Optica y Electrónica (INAOE), Puebla, México, in 1981, and the Ph.D. degree from the Katholieke Univesiteit Leuven, Leuven Belgium in 1992. From 1981 to 1983, he was with the Electrical Engineering Department, INAOE, where he was involved with switched-capacitor circuit design. In 1983, he joined the Department of Electrical Engineering, Universidad Autonoma de Puebla, where he remained until 1993; He was a co-founder of the graduate program on Opto-Electronics in 1992. From 1985 to 1986, he was a Visiting Scholar in the Electrical Engineering Department, Texas A&M University. In 1993, he re-joined the Electronics Department, INAOE, and from May 1995 to December 1998, was the Head of the Electronics Department; He was a co-founder of the Ph.D. program on Electronics in 1993. He is currently with the Department of Electrical Engineering (Analog and Mixed Signal Center) Texas A&M University, at College Station, where He holds the position of Associate Professor. His current field of research is in the design and fabrication of integrated circuits for communication and biomedical application. Dr. Silva-Martinez has served as IEEE CASS Vice President Region-9 (1997–1998), and as Associate Editor for IEEE Transactions on Circuits and Systems part-II from 1997–1998 and May 2002–December 2003. Since January 2004 is serving as Associate Editor of IEEE TCAS Part-I. He was the main organizer of the 1998 and 1999 International IEEE-CAS Tour in region 9, and Chairman of the International Workshop on Mixed-Mode IC Design and Applications (1997–1999). He is the inaugural holder of the TI Professorship-I in Analog Engineering, Texas A&M University. He was a co-recipient of the 1990 European Solid-State Circuits Conference Best Paper Award.

Edgar Sánchez-Sinencio was born in Mexico City, Mexico. He received the degree in communications and electronic engineering (Professional degree) from the National Polytechnic Institute of Mexico, Mexico City, the M.S.E.E. degree from Stanford University, CA, and the Ph.D. degree from the University of Illinois at Urbana-Champaign, in 1966, 1970, and 1973, respectively. In 1974 he held an industrial Post-Doctoral position with the Central Research Laboratories, Nippon Electric Company, Ltd., Kawasaki, Japan. From 1976 to 1983 he was the Head of the Department of Electronics at the Instituto Nacional de Astrofísica, Optica y Electrónica (INAOE), Puebla, Mexico. He was a Visiting Professor in the Department of Electrical Engineering at Texas A&M University, College Station, during the academic years of 1979–1980 and 1983-1984. He is currently the TI J Kilby Chair Professor and Director of the Analog and Mixed-Signal Center at Texas A&M University. He was the General Chairman of the 1983 26th Midwest Symposium on Circuits and Systems. He was an Associate Editor for IEEE Trans. on Circuits and Systems, (1985–1987), and an Associate Editor for the IEEE Trans. on Neural Networks. He is the former Editor-in-Chief of the Transactions on Circuits and Systems II. He is co-author of the book Switched Capacitor Circuits (Van Nostrand-Reinhold 1984), and co-editor of the book “Low Voltage/Low-Power Integrated Circuits and Systems (IEEE Press 1999). In November 1995 he was awarded an Honoris Causa Doctorate by the National Institute for Astrophysics, Optics and Electronics, Mexico. The first honorary degree awarded for Microelectronic Circuit Design contributions. He is co-recipient of the 1995 Guillemin-Cauer for his work on Cellular Networks. He is a former IEEE CAS Vice President-Publications. He was also the co-recipient of the 1997 Darlington Award for his work on high-frequency filters He received the Circuits and Systems Society Golden Jubilee Medal in 1999. He was the IEEE Circuits and Systems Society, Representative to the Solid-State Circuits Society (2000–2002). He is presently a member of the IEEE Solid-State Circuits Fellow Award Committee. His present interests are in the area of RF-Communication circuits and analog and mixed-mode circuit design. He is an IEEE Fellow Member since 1992.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Méndez-Rivera, M.G., Valdes-Garcia, A., Silva-Martinez, J. et al. An On-Chip Spectrum Analyzer for Analog Built-In Testing. J Electron Test 21, 205–219 (2005). https://doi.org/10.1007/s10836-005-6351-y

Download citation

  • Received:

  • Revised:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10836-005-6351-y

Keywords

Search

Navigation