Skip to main content
Log in

Abstract

This paper presents the implementation of a wireless multimedia DSP chip for mobile applications. The implemented DSP chip supports communication instructions for Viterbi, timing synchronization, etc. as well as multimedia instructions. The DSP can handle variable length data and perform four MACs in a cycle. The proposed DSP employs parallel processing techniques, such as SIMD, vector processing, DSP schemes and adopts low power features for wireless applications. The implemented DSP chip includes test circuits and various peripherals, such as DMA, bus arbitration, timer, etc. This chip has been modeled by Verilog HDL and implemented using the 0.35 μm HCB60 library. The total gate count excluding memory is about 170,000 gates and the clock frequency is 100 MHz.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. L.H. Chen, W.L. Liu, O.T. Chen, and R.L. Ma, “A Reconfigurable Digital Signal Processor Architecture for High-Efficiency MPEG-4 Video Encoding,” in Proc. IEEE Int. Multimedia and Expo Conf., Aug. 2002, pp. 165–168.

  2. M. Hosemann, G.P. Fettweis, V. Nikolajevic, and R. Nussgen, “Applications for the Highly Parallel Mobile Multimedia Modem M3-DSP,” in Proc. Euromicro Conf. Aug. 2002, pp. 176–182.

  3. D. Eliemble, “Optimizing DSP and Media Benchmarks for Pentium 4: Hardware and Software Issues,” in Proc. IEEE Int. Multimedia and Expo Conf., Aug. 2002, pp. 109–112.

  4. R.E. Owen and S. Purcell, “An Enhanced DSP Architecture for the Seven Multimeda Functions: The Mpact2 Media Processor,” in Proc. IEEE Workshop on Signal Processing Syst. (SIPS’97), Nov. 1997, pp. 76–85.

  5. Texas Instruments Inc., TMS320C62xx User’s Manual, 1997.

  6. Analog Devices Inc., ADSP 2106x SHARC User’s Manual, 1996. CARMEL DSP Core Data Sheet, Infineon Technologies Inc., 1999.

  7. Motorola Inc., DSP56100 Digital Signal Processor User’s Manual, 1994.

  8. A. Wahyudi and A. Omondi, “Parallel Multimedia Processor Using Customised Infineon TriCores,” in Proc. IEEE Symp. On Digital Syst. Design (DSD’02), Sep. 2002, pp. 140–147.

  9. F. Hayakawa, H. Okano, and A. Suga, “An 8-Way VLIW Embedded Multimedia Processor with Advanced Cache Mechanism,” in Proc. IEEE Asia-Pacific Conf. (APC’02), Oct. 2002, pp. 213–216.

  10. J. Villalba, G. Bandera, M.A. Gonzalez, J. Hormigo, and E.L. Zapata, “Polynomial Evaluation on Multimedia Processors,” in Proc. IEEE Int. Conf. Application-Specific Syst. (ASAP’02), July 2002, pp. 265–274.

  11. A. Peleg and U. Weiser, “MMX Technology Extension to the Intel Architecture,” IEEE Micro, vol. 16, 1996, pp. 42–50.

    Article  Google Scholar 

  12. A. Catado, “Oak DSP Moves Image Processing to Peripherals, EE Times Articles [Online],” (2001). Available: http://www.eetimes.com

  13. J. Glossner, J. Moreno, M. Moudgill, J. Derby, E. Hokenek, D. Meltzer, U. Shvadron, and M. Ware, “Trends in Compilable DSP Architecture,” in Proc. IEEE Workshop Signal Processing Syst. (SIPS’00), 2000, pp. 181–199.

  14. H.J. Yoo, S.H. Ong, and M.H. Sunwoo, “The MDSP (Multimedia DSP) Chip with an Enhanced Instruction Set,” in Proc. IEEE Int. ASIC/SOC Conf., 1999, pp. 98–102.

  15. W.H. Chen, S.C. Harrison, and S.C. Fralic, “A Fast Computational Algorithm for the Discrete Cosine Transform,” IEEE Trans. on Comm., vol. COM-25, 1977, pp. 1004–1009.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Myung H. Sunwoo.

Additional information

Junghoo Lee received the B.S. degree in electronic engineering from Ajou University, Suwon, Korea in 2002. He is currently working toward the Ph.D. degree with School of Electrical and Computer Engineering, Ajou University. His main research interests include SOC design and application-specific DSP chip design.

Myung H. Sunwoo received the B.S. degree in electronic engineering from the Sogang University in 1980, the M.S. degree in electrical and electronics from the Korea Advanced Institute of Science and Technology in 1982, and the Ph.D. degree in electrical and computer engineering from the University of Texas at Austin in 1990.

He worked for Electronics and Telecommunications Research Institute (ETRI) in Daejeon, Korea from 1982 to 1985 and Digital Signal Processor Operations, Motorola, Austin, TX from 1990 to 1992. Since 1992, he has been a Professor with the School of Electrical and Computer Engineering, Ajou University in Suwon, Korea. In 2000, he was a Visiting Professor in the Department of Electrical and Computer Engineering, the University of California, Davis, CA. He is the Director of the National Research Laboratory sponsored by the Ministry of Science and Technology. His research interests include VLSI architectures, SOC design for multimedia and communications, and application-specific DSP architectures.

Dr. Sunwoo has published more than 120 papers in international transactions/journals and conferences and also has 28 patents including five U.S. patents. He served as a Technical Program Chair of the IEEE Workshop on Signal Processing Systems (SIPS) in 2003 and a member of the technical program committee of various international conferences. He has received a number of research awards from the Ministry of Commerce, Industry and Energy, Samsung Electronics, and professional foundations. He served as an Associate Editor for the IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2002–2003) and as a Guest Editor for the Journal of VLSI Signal Processing (Kluwer, 2004). Currently, He is a Senior Member of IEEE and a Chair of the IEEE CAS Society of the Seoul Chapter.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Lee, J.L., Sunwoo, M.H. Implementation of a Wireless Multimedia DSP Chip for Mobile Applications. J VLSI Sign Process Syst Sign Image Video Technol 40, 281–287 (2005). https://doi.org/10.1007/s11265-005-5264-4

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11265-005-5264-4

Keywords

Navigation