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Architecture-Independent Loop Parallelisation

  • Book
  • © 2000

Overview

Authors:
  1. R. C. Calinescu

    1. oxford University Computing Laboratory, Oxford, UK

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Part of the book series: Distinguished Dissertations (DISTDISS)

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Table of contents (9 chapters)

  1. Front Matter

    Pages i-xviii
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  2. Introduction

    • R. C. Calinescu
    Pages 1-4

  3. The Bulk-Synchronous Parallel Model

    • R. C. Calinescu
    Pages 5-12

  4. Data Dependence Analysis and Code Transformation

    • Radu C. Calinescu
    Pages 13-22

  5. Communication Overheads in Loop Nest Scheduling

    • Radu C. Calinescu
    Pages 23-42

  6. Template-Matching Parallelisation

    • R. C. Calinescu
    Pages 43-83

  7. Generic Loop Nest Parallelisation

    • R. C. Calinescu
    Pages 85-107

  8. A Strategy and a Tool for Architecture-Independent Loop Parallelisation

    • R. C. Calinescu
    Pages 109-123

  9. The Effectiveness of Architecture-Independent Loop Parallelisation

    • Radu C. Calinescu
    Pages 125-135

  10. Conclusions

    • R. C. Calinescu
    Pages 139-143

  11. Back Matter

    Pages 145-172
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Keywords

About this book

Architecture-independent programming and automatic parallelisation have long been regarded as two different means of alleviating the prohibitive costs of parallel software development. Building on recent advances in both areas, Architecture-Independent Loop Parallelisation proposes a unified approach to the parallelisation of scientific computing code. This novel approach is based on the bulk-synchronous parallel model of computation, and succeeds in automatically generating parallel code that is architecture-independent, scalable, and of analytically predictable performance.

Authors and Affiliations

  • oxford University Computing Laboratory, Oxford, UK

    R. C. Calinescu

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