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Logic Synthesis for Field-Programmable Gate Arrays

  • Book
  • © 1995

Overview

Authors:
  1. Rajeev Murgai

    1. Fujitsu Laboratories of America, Inc., USA

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  2. Robert K. Brayton

    1. University of California, Berkeley, USA

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  3. Alberto Sangiovanni-Vincentelli

    1. University of California, Berkeley, USA

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Part of the book series: The Springer International Series in Engineering and Computer Science (SECS, volume 324)

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Table of contents (9 chapters)

  1. Front Matter

    Pages i-xvii
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  2. Introduction

    1. Front Matter

      Pages 1-1
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    2. Introduction

      • Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 3-17

    3. Background

      • Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 19-47

  3. Look-up Table (LUT) Architectures

    1. Front Matter

      Pages 49-49
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    2. Mapping Combinational Logic

      • Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 51-176

    3. Logic Optimization

      • Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 177-193

    4. Complexity Issues

      • Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 195-254

    5. Mapping Sequential Logic

      • Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 255-297

    6. Performance Directed Synthesis

      • Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 299-321

  4. Multiplexor-Based Architectures

    1. Front Matter

      Pages 323-323
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    2. Mapping Combinational Logic

      • Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 325-395

  5. Conclusions

    1. Front Matter

      Pages 397-397
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    2. Conclusions

      • Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
      Pages 399-407

  6. Back Matter

    Pages 409-427
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Keywords

About this book

Short turnaround has become critical in the design of electronic systems. Software- programmable components such as microprocessors and digital signal processors have been used extensively in such systems since they allow rapid design revisions. However, the inherent performance limitations of software-programmable systems mean that they are inadequate for high-performance designs. Designers thus turned to gate arrays as a solution. User-programmable gate arrays (field-programmable gate arrays, FPGAs) have recently emerged and are changing the way electronic systems are designed and implemented. The growing complexity of the logic circuits that can be packed onto an FPGA chip means that it has become important to have automatic synthesis tools that implement logic functions on these architectures. Logic Synthesis for Field-Programmable Gate Arrays describes logic synthesis for both look-up table (LUT) and multiplexor-based architectures, with a balanced presentation of existing techniques together with algorithms and the system developed by the authors.
Audience: A useful reference for VLSI designers, developers of computer-aided design tools, and anyone involved in or with FPGAs.

Authors and Affiliations

  • Fujitsu Laboratories of America, Inc., USA

    Rajeev Murgai

  • University of California, Berkeley, USA

    Robert K. Brayton, Alberto Sangiovanni-Vincentelli

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