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Architecture of High Performance Computers Volume II

Array processors and multiprocessor systems

  • Book
  • © 1989

Overview

Authors:
  1. R. N. Ibbett

    1. Department of Computer Science, University of Edinburgh, Edinburgh, Scotland

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  2. N. P. Topham
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Table of contents (9 chapters)

  1. Front Matter

    Pages i-viii
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  2. Introduction

    • R. N. Ibbett, N. P. Topham
    Pages 1-5

  3. Array-processor Architecture

    • R. N. Ibbett, N. P. Topham
    Pages 6-21

  4. Interconnection Networks

    • R. N. Ibbett, N. P. Topham
    Pages 22-42

  5. Practical Array Architectures

    • R. N. Ibbett, N. P. Topham
    Pages 43-66

  6. Array Processor Software

    • R. N. Ibbett, N. P. Topham
    Pages 67-82

  7. Multiprocessor Architecture

    • R. N. Ibbett, N. P. Topham
    Pages 83-108

  8. Shared-memory Multiprocessors

    • R. N. Ibbett, N. P. Topham
    Pages 109-140

  9. Message-passing Multiprocessors

    • R. N. Ibbett, N. P. Topham
    Pages 141-167

  10. Multiprocessor Software

    • R. N. Ibbett, N. P. Topham
    Pages 169-193

  11. Back Matter

    Pages 194-209
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Keywords

Authors and Affiliations

  • Department of Computer Science, University of Edinburgh, Edinburgh, Scotland

    R. N. Ibbett

Bibliographic Information

  • Book Title: Architecture of High Performance Computers Volume II

  • Book Subtitle: Array processors and multiprocessor systems

  • Authors: R. N. Ibbett, N. P. Topham

  • DOI: https://doi.org/10.1007/978-1-4899-6701-5

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Roland N. Ibbett and Nigel P. Topham 1989

  • Hardcover ISBN: 978-0-387-91353-7Due: 20 March 1989

  • Softcover ISBN: 978-1-4899-6703-9Published: 16 October 2013

  • eBook ISBN: 978-1-4899-6701-5Published: 11 November 2013

  • Edition Number: 1

  • Number of Pages: VIII, 209

  • Topics: Processor Architectures

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