Graphs in VLSI

Networks are pervasive. Very large scale integrated (VLSI) systems are no different, consisting of dozens of interconnected subsystems, hundreds of modules, and many billions of transistors and wires. Graph theory is crucial for managing and analyzing these systems. In this book, VLSI system design is discussed from the perspective of graph theory. Starting from theoretical foundations, the authors uncover the link connecting pure mathematics with practical product development. This book not only provides a review of established graph theoretic practices, but also discusses the latest advancements in graph theory driving modern VLSI technologies, covering a wide range of design issues such as synchronization, power network models and analysis, and interconnect routing and synthesis.

• Provides a practical introduction to graph theory in the context of VLSI systems engineering;
• Reviews comprehensively graph theoretic methods and algorithms commonly used during VLSI product development process;
• Includes a review of novel graph theoretic methods and algorithms for VLSI system design.

Rassul Bairamkulov was born in August 1994 in Karaganda, Kazakhstan. He received a Bachelor of Engineering in Electrical and Electronic Engineering degree from Nazarbayev University in Astana, Kazakhstan in 2016, and a Master of Science degree in Electrical Engineering from the University of Rochester in Rochester, New York in 2018. In the summers of 2018 and 2020, he interned with the Power Design team at Qualcomm Inc. in San Diego, California. He is currently completing the Ph.D. degree in electrical engineering from the University of Rochester under the supervision of Prof. Eby G. Friedman. His current research interests include graph theory, physical design of integrated circuits, and electronic design automation of conventional and emerging VLSI technologies.

Eby G. Friedman received the B.S. degree in electrical engineering from the Lafayette College, Easton, Pennsylvania, and the M.S. and Ph.D. degrees in electrical engineering from the University of California at Irvine, Irvine, California. He was with Hughes Aircraft Company in southern California from 1979 to 1991, rising to Manager of the Signal Processing Design and Test Department, where he was responsible for the design and test of high performance digital and analog ICs. He has been with the Department of Electrical and Computer Engineering, University of Rochester in Rochester, New York since 1991, where he is a Distinguished Professor and the Director of the High Performance VLSI/IC Design and Analysis Laboratory. He is also a Visiting Professor with the Technion – Israel Institute of Technology in Haifa, Israel. He has authored almost 600 articles and book chapters and authored or edited 20 books in the fields of high speed and low power CMOS design techniques, 3-D design methodologies, high speed interconnect, superconductive circuits, and the theory and application of synchronous clock and power distribution networks, and he holds 24 patents. His current research and teaching interests include high performance synchronous digital and mixed-signal circuit design and analysis with application to high speed portable processors, low power wireless communications, and server farms. Dr. Friedman is a recipient of the IEEE Circuits and Systems Mac Van Valkenburg Award, the IEEE Circuits and Systems Charles A. Desoer Technical Achievement Award, the University of Rochester Graduate Teaching Award, and the College of Engineering Teaching Excellence Award. He was the Editor-in-Chief (EIC) and Chair of the Steering Committee of the IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS and EIC of the Microelectronics Journal, a Regional Editor of the JOURNAL OF CIRCUITS, SYSTEMS AND COMPUTERS, an editorial board member of numerous journals, and a program and technical chair of several IEEE conferences. He is a Senior Fulbright Fellow, a National Sun Yat-sen University Honorary Chair Professor, and an inaugural member of the UC Irvine Engineering Hall of Fame.