Abstract
This paper presents a new approach to design embedded systems based on dynamic partial reconfigurable FPGAs. The approach is intended to allow designing of systems with runtime reconfiguration without explicit specification by the designer. The design entry point is the HDL OSSS, a SystemC extension allowing for synthesizable object orientation and polymorphism.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Agosta, Bruschi and Sciuto (2004). Synthesis of dynamic class loading specifications on reconfigurable hardware. Proceedings of the Second IEEE International Workshop on Electronic Design, Test and Applications (DELTA’04).
Atmel Corporation (2002). Datasheet AT40K. www.atmel.com.
Bruschi, Francesco (2004). Methodological Issues in the System Level Design of Embedded Systems. PhD thesis, Politecnico di Milano, Politecnico die Milano, Dipartimento di Elettronica e Informazione, Piazza Leonardo da Vinci 32, I 20133 Milano.
Daemen, Joan and Rijmen, Vincent (1999). AES proposal: Rijndael. Technical report. daemen.j@protonworld.com, vincent.rijmen@esat.kuleuven.ac.be.
DATA ENCRYPTION STANDARD (DES), (1993). Federal Information Processing Standards Publication, fips pub 46-2 edition. http://www.itl.nist.gov/fipspubs/index.htm.
Grimpe, Eike and Oppenheimer, Frank (2001). Aspects of Object-Oriented Hardware Modelling with SystemC-Plus. In Forum on Design Languages FDL’01.
Grimpe, Eike, Timmermann, Bernd, Fandrey, Tiemo, Biniasch, Ramon, and Oppenheimer, Frank (2002). SystemC Object-Oriented Extensions and Synthesis Features. In Forum on Design Languages FDL’02. Marseille.
Lim, David and Peattie, Mike (2002). Two Flows for Partial Reconfiguration: Module Based or Small Bit Manipulations. Xilinx, Inc. www.xilinx.com.
Noguera, Juanjo and Badia, Rosa M. (2002). HW/SW Codesign Techniques for Dynamically Reconfigurable Architectures. In IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 10, No. 4, pages pp 399–415. IEEE.
Radetzki, Martin (2000). Synthesis of Digital Circuits from Object-Oriented Specifications. PhD thesis, Carl von Ossietzky Universität Oldenburg, http://odette.offis.de.
Schneier, Bruce (1993). Description of a New Variable-Length Key, 64-Bit Block Cipher (Blowfish). In Fast Software Software Encryption, Cambridge Security Workshop Proceedings. http://www.schneier.com/paper-blowfish-fse.html.
Seméria, Luc and Micheli, Giovanni De (1998). Encoding of Pointers for Hardware Synthesis. In Proc. International Workshop on IP-based Synthesis and System Design IWLAS’98, pages pp.57–63.
Seméria, Luc, Sato, Koichi, and Micheli, Giovanni De (2000). Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C. In Proc. Design Automation and Test in Europe DATE’00, pages pp.312–319.
SystemC 2.0.1 Language Reference Manual (2003). Open SystemC Initiative, 1177 Braham Lane 302, San Jose, CA 95118-3799, revision 1.0 edition. www.systemc.org.
Virtex-II Platform FPGAs: Complete Data Sheet (2003). Xilinx, Inc. www.xilinx.com.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2005 Springer
About this chapter
Cite this chapter
Schallenberg, A., Nebel, W., Oppenheimer, F. (2005). Designing for Dynamic Partially Reconfigurable FPGAS with Systemc and OSSS. In: Boulet, P. (eds) Advances in Design and Specification Languages for SoCs. Springer, Boston, MA. https://doi.org/10.1007/0-387-26151-6_14
Download citation
DOI: https://doi.org/10.1007/0-387-26151-6_14
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-387-26149-2
Online ISBN: 978-0-387-26151-5
eBook Packages: EngineeringEngineering (R0)