Skip to main content

Calculating State Spaces of Hierarchical Petri Nets Using BDD

  • Chapter
Design of Embedded Control Systems

Abstract

The state space of a hierarchical Petri net can be presented as a hierarchical reachability graph. However, the hierarchical reachability graph can be described with the help of logic functions. On the other hand, binary decision diagrams (BDD) are efficient data structures for representing logic functions. Because of the exponential growth of the number of states in Petri nets, it is difficult to process the whole state space. Therefore the abstraction method of selected macromodules gives the possibility of analysis and synthesis for more complex systems. The goal of the paper is to show a method for representing the state space in the form of a connected system of binary decision diagrams as well as its calculation algorithm.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. T. Murata, Petri nets: properties, analysis and applications. In: Proceedings of the IEEE, 77(4), 541–580 (1989).

    Article  Google Scholar 

  2. E. Pastor, O. Roig, J. Cortadella, M. R. Badia, Application and theory of Petri nets. In: Proceedings of 15th International Conference, Lecture Notes in Computer Science, Vol. 815, Petri Net Analysis Using Boolean Manipulation. Springer-Verlang (1994).

    Google Scholar 

  3. K. Biliński, Application of Petri nets in parallel controller design. PhD. Thesis, University of Bristol (1996).

    Google Scholar 

  4. M. Węgrzyn, Hierarchical implementation of concurrent logic controllers by means of FPGAs. PhD. Thesis, Warsaw University of Technology (1998).

    Google Scholar 

  5. R. Drechsler, Binary Decision Diagram. Theory and Implementation. Kluwer Academic Publishers, pp. 9–30 (1998).

    Google Scholar 

  6. S. Minato, Binary Decision Diagrams and Applications for VLSI CAD. Kluwer Academic Publishers, pp. 9–22 (1996).

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 2005 Springer Science+Business Media, Inc.

About this chapter

Cite this chapter

Miczulski, P. (2005). Calculating State Spaces of Hierarchical Petri Nets Using BDD. In: Design of Embedded Control Systems. Springer, Boston, MA. https://doi.org/10.1007/0-387-28327-7_8

Download citation

  • DOI: https://doi.org/10.1007/0-387-28327-7_8

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-387-23630-8

  • Online ISBN: 978-0-387-28327-2

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics