Skip to main content

HIGH-SPEED BANDPASS ADCs

  • Chapter
Analog Circuit Design

Abstract

A bandpass ADC digitizes a bandpass signal directly, without prior conversion to baseband. Bandpass ADCs are well-suited to wired and wireless receivers, and can reduce system complexity, increase integration and improve performance. This paper describes architectures for bandpass and quadrature bandpass ADCs and examines several circuit considerations associated with operation at sampling rates in the 100-MHz range.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. T. H. Pearce and A. C. Baker, “Analogue to digital conversion requirements for HF radio receivers,” Proceedings of the IEE Colloquium on system aspects and applications of ADCs for radar, sonar and communications, London, Nov. 1987, Digest No. 1987/92.

    Google Scholar 

  2. S. A. Jantzi, K. W. Martin and A. S. Sedra, “Quadrature bandpass Δ∑ modulation for digital radio,” IEEE Journal of Solid-State Circuits, vol. 32, no. 12, pp. 1935–1950, Dec. 1997.

    Google Scholar 

  3. G. Raghavan, J. F. Jensen, J. Laskowski, M. Kardos, M. G. Case, M. Sokolich and S. Thomas III, “Architecture, design, and test of continuous-time tunable intermediate-frequency bandpass delta-sigma modulators,” IEEE Journal of Solid-State Circuits, vol. 36, no. 1, pp. 5–13, Jan. 2001.

    Google Scholar 

  4. J. Van Engelen and R. Van De Plassche, Bandpass sigma delta modulatorsstability analysis, performance and design aspects, Norwell, MA: Kluwer Academic Publishers 1999.

    Google Scholar 

  5. R. Schreier and G. C. Temes, Understanding Delta-Sigma Data Converters, John Wiley & Sons Inc., Hoboken, New Jersey, 2005.

    Google Scholar 

  6. L. J. Breems et al., “A cascaded continuous-time Δ∑modulator with 67 dB dynamic range in 10 MHz bandwidth,” IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 72–73, Feb. 2004.

    Google Scholar 

  7. J. A. E. P. Van Engelen, R.J. Van De Plassche, E. Stikvoort and A. G. Venes, “A sixth-order continuous-time bandpass sigma-delta modulator for digital radio IF,” IEEE Journal of Solid-State Circuits, vol. 34, no. 12, pp. 1753–1764, Dec. 1999.

    Google Scholar 

  8. R. Schreier, J. Lloyd, L. Singer, D. Paterson, M. Timko, M. Hensley, G. Patterson, K. Behel, J. Zhou and W. J, Martin, “A 10-300 MHz IF-digitizing IC with 90-105 dB dynamic range and 15-333 kHz bandwidth,” IEEE Journal of Solid-State Circuits, vol. 37, no. 12, pp. 1636–1644, December 2002.

    Google Scholar 

  9. W. Schofield, D. Mercer, and L.S. Onge, “A 16b 400MS/s DAC with <–80 dBc IMD to 300 MHz and <–160 dBm/Hz noise power spectral density, IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 126–127, Feb. 2003.

    Google Scholar 

  10. T. Shui and R. Schreier, “Mismatch shaping for a current-mode multibit delta-sigma DAC,” IEEE Journal of Solid-State Circuits, vol. 34, pp. 331–338, March 1999.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2006 Springer

About this chapter

Cite this chapter

Schreier, R. (2006). HIGH-SPEED BANDPASS ADCs. In: Steyaert, M., Huijsing, J., **, M. (eds) Analog Circuit Design. Springer, Dordrecht. https://doi.org/10.1007/1-4020-3885-2_5

Download citation

  • DOI: https://doi.org/10.1007/1-4020-3885-2_5

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-1-4020-3884-6

  • Online ISBN: 978-1-4020-3885-3

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics