Abstract
A design for a hardware interface that implements CSP-like communication primitives is presented. The design is based on a bus scheme that allows processes to “eavesdrop” on messages not directly addressed to them. A temporal logic specification is given for the network and an outline of a verification proof is sketched.
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8. References
C.A.R. Hoare “Communicating Sequential Processes', Communications of the ACM, Vol. 21, No. 8, 666–677, August 1978.
Z. Manna and A. Pnueli, “Verification of Concurrent Programs: Temporal Proof Principles”, Proc. of the Workshop on Logic of Programs (D. Kozen, ed.), Yorktown Heights, NY (1981).
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D. Ron, “Temporal Verification of Communication Protocols”, M.Sc. Thesis, Weizmann Institute.
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D. Ron, F. Rosemberg and A. Pnueli, “Verification of a Hardware Implementation of the CSP Primitives”. In preparation.
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© 1984 Springer-Verlag Berlin Heidelberg
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Ron, D., Rosemberg, F., Pnueli, A. (1984). A hardware implementation of the CSP primitives and its verification. In: Paredaens, J. (eds) Automata, Languages and Programming. ICALP 1984. Lecture Notes in Computer Science, vol 172. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-13345-3_39
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DOI: https://doi.org/10.1007/3-540-13345-3_39
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