Abstract
The VLSI implementation of the Accelerated Overrelaxation (AOR) method, when used for the accurate computation of the least-squares solutions of overdetermined systems, is the problem addressed here. As the size of this computational task is usually very large, we use space-time domain expansion techniques to partition the computation and map it onto a fixed size VLSI architecture.
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© 1988 Springer-Verlag Berlin Heidelberg
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Papadopoulou, E.P., Papatheodorou, T.S. (1988). Least-squares iterative solution on a fixed-size VLSI architecture. In: Houstis, E.N., Papatheodorou, T.S., Polychronopoulos, C.D. (eds) Supercomputing. ICS 1987. Lecture Notes in Computer Science, vol 297. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-18991-2_53
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DOI: https://doi.org/10.1007/3-540-18991-2_53
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