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Task-Parallel Programming of Reconfigurable Systems

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Field-Programmable Logic and Applications (FPL 2001)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2147))

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Abstract

This paper presents task-parallel programming, a style of application development for reconfigurable systems. Task-parallel programming enables efficient interaction between concurrent hardware and software tasks. In particular, it supports description of communication and computation tasks running in parallel to allow effective implementation of designs where data transfer time between hardware and software components is comparable to computation time. This approach permits precise specification of parallelism without requiring hardware design knowledge. We present language extensions for task-parallel programming, inspired by the occam and Handel languages. A compilation scheme for this method is described: the four main stages are memory mapping, channel implementation, software generation and hardware synthesis. Our techniques have been evaluated using video applications on the RC1000-PP hardware platform.

This work was supported by a European Union TMR training project, the UK Engineering and Physical Sciences Research Council, Celoxica Limited, and Xilinx Inc.

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© 2001 Springer-Verlag Berlin Heidelberg

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Weinhardt, M., Luk, W. (2001). Task-Parallel Programming of Reconfigurable Systems. In: Brebner, G., Woods, R. (eds) Field-Programmable Logic and Applications. FPL 2001. Lecture Notes in Computer Science, vol 2147. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44687-7_18

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  • DOI: https://doi.org/10.1007/3-540-44687-7_18

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-42499-4

  • Online ISBN: 978-3-540-44687-3

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