Abstract
Self-reconfiguration is a technique using which configured logic can quickly modify itself at runtime to suit application requirements. Although performance improvements using self-reconfiguration have been demonstrated, the technique itself has been only informally described. Based on an abstract reconfigurable device model, a precise definition of self-reconfiguration is presented in this paper. Various practical issues in efficiently implementing self- reconfiguration are also discussed.
A competing approach to self-reconfiguration is the use of a von Neumann processor on the same chip as the reconfigurable logic. Both alternatives can provide on-chip configuration modification. The performance of both alternatives is evaluated for a frequently used configuration modification operation. The approaches used for both alternatives are described and the performance of both approaches is evaluated. Self-reconfiguration is found to require significantly lesser area as well as significantly lesser time compared to the attached processor approach.
This work was supported by DARPA contract no. DABT63-99-1-0004 and by NSF grant no. CCR-9900613.
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Sidhu, R., Prasanna, V.K. (2002). Efficient Metacomputation Using Self-Reconfiguration. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_72
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DOI: https://doi.org/10.1007/3-540-46117-5_72
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