Abstract
In this paper we have presented two different approaches toward circuit partitioning problem. One approach is based on a graph defined by connectivities among modules. The other one is based on geometric transformation. Since we have applications to VLSI layout design in mind, we need to check the effectiveness of these approaches by experiments, which was left as future subjects.
This work was partially supported by Grant in Aid for Scientific Research of the Ministry of Education, Science and Cultures of Japan
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© 1991 Springer-Verlag Berlin Heidelberg
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Asano, T., Tokuyama, T. (1991). Circuit partitioning algorithms: Graph model versus geometry model. In: Hsu, WL., Lee, R.C.T. (eds) ISA'91 Algorithms. ISA 1991. Lecture Notes in Computer Science, vol 557. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-54945-5_53
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DOI: https://doi.org/10.1007/3-540-54945-5_53
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