The design of a new FPGA architecture

Abstract

A new Field Programmable Gate Array (FPGA) architecture is described. This architecture includes a number of novel features not found in currently available FPGAs. It is believed to offer a significantly improved logic density in some common applications.

This paper describes the development of the FPGA and looks at the mapping onto it of some interesting application circuit elements. The design is discussed in approximately chronological order which allows us to explain other options which were considered and rejected during the development process.

Formerly of Oxford Parallel, Parks Road, Oxford OX1 3QD.

This work was undertaken by Oxford Parallel, which is part of Oxford University Computing Laboratory. The work was initially funded by the Department of Trade and Industry under the Parallel Applications Programme, with the support of Inmos Limited (now part of SGS-Thomson Microelectronics Limited). Since May 1994 it has been supported by ESPRIT project P8202 (CoCo).