Abstract
Programmable logic provides an ideal balance between the flexibility of a DSP processor and the performance of a DSP ASIC solution. Programmable logic also provides a strong complement to a DSP processor to offload computationally intensive functions/algorithms as a DSP coprocessor. In addition to improving system performance, this coprocessor methodology also acts to protect investments that have been trade in DSP processor tools, code, and experience by extending the potential applications that could initially be done with a given DSP processor.
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© 1997 Springer-Verlag Berlin Heidelberg
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Greenfield, D., Crome, C., Won, M.S., Amos, D. (1997). Enhancing fixed point DSP processor performance by adding CPLD's as coprocessing elements. In: Luk, W., Cheung, P.Y.K., Glesner, M. (eds) Field-Programmable Logic and Applications. FPL 1997. Lecture Notes in Computer Science, vol 1304. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63465-7_237
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DOI: https://doi.org/10.1007/3-540-63465-7_237
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