Abstract
This chapter presents the algorithm selected in 2001 as the Advanced Encryption Standard. This algorithm is the base for implementing security and privacy based on symmetric key solutions in almost all new applications. Secret key algorithms are used in combination with modes of operation to provide different security properties. The most used modes of operation are presented in this chapter. Finally an overview of the different techniques of software and hardware implementations is given.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
DES Modes of Operation, FIPS, Federal Information Processing Standard, Pub No. 81. Available at http://csrc.nist.gov/fips/change81.ps, December 1980.
ISO/IEC 9797. Data integrity mechanism using a cryptographic check function employing a block cipher algorithm. ISO, 1989.
M. Bellare, J. Kilian, and P. Rogaway. The security of cipher block chaining. In Advances in Cryptology — CRYPTO ’94, pages 340–358, 1994.
G. Bertoni, A. Bircan, L. Breveglieri, P. Fragneto, M. Macchetti, and V. Zaccaria. About the performances of the Advanced Encryption Standard in embedded systems with cache memory. In Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS ’03. 25–28 May 2003, volume 5, pages 145–148, 2003.
G. Bertoni, L. Breveglieri, R. Farina, and F. Regazzoni. Speeding Up AES By Extending a 32 bit Processor Instruction Set. In Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP’06), pages 275–282, 2006.
G. Bertoni, M. Macchetti, L. Negri, and P. Fragneto. Power-efficient asic synthesis of cryptographic sboxes. In D. Garrett, J. Lach, and C. A. Zukowski, editors, ACM Great Lakes Symposium on VLSI, pages 277–281. ACM, 2004.
D. Canright. A very compact s-box for aes. In CHES, pages 441–455, 2005.
P. Chodowiec and K. Gaj. Very compact FPGA implementation of the AES algorithm. In C. D. Walter, Ç. K. Koç, D. Naccache, and C. Paar, editors, Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems — CHES 2003, LNCS 2779, pages 319–333, Springer-Verlag, Berlin, 2003.
C. Clapp. Instruction-level parallelism in AES Candidates. In Proceedings: Second AES Candidate Conference (AES2), Rome, Italy, March 1999.
CRYPTOREC. Cryptography Research and Evaluation Committees. http:// www.cryptrec.jp/ english/about.html.
J. Daemen and V. Rijmen. AES proposal: Rijndael. In First Advanced Encryption Standard (AES) Conference, Ventura, CA, USA, 1998.
J. Daemen and V. Rijmen. The Design of Rijndael. Springer-Verlag, Berlin, Germany, 2001.
ESTREAM. ECRYPT Stream Cipher Project. http://www.ecrypt.eu.org/stream.
M. Feldhofer, S. Dominikus, and J. Wolkerstorfer. Strong authentication for rfid systems using the aes algorithm. In M. Joye and J.-J. Quisquater, editors, CHES, LNCS 3156, pages 357–370. Springer, 2004.
V. Fischer and M. Drutarovsky. Two Methods of Rijndael Implementation in Reconfigurable Hardware. In Ç. K. Koç, D. Naccache, and C. Paar, editors, Proceedings of the Second Workshop on Cryptographic Hardware and Embedded Systems — CHES 2001, LNCS 2162, pages 51–65, Springer-Verlag, Berlin, Germany, 2001.
V. D. Gligor and P. Donescu. Fast encryption and authentication: Xcbc encryption and xecb authentication modes. In Fast Software Encryption, FSE2001, pages 92–108, 2001.
A. Hodjat and I. Verbauwhede. Area-throughput trade-offs for fully pipelined 30 to 70 gbits/s aes processors. IEEE Transactions on Computers, 55(4):366–372, 2006.
D. Hwang, K. Tiri, A. Hodjat, B.-C. Lai, S. Yang, P. Schaumont, and I. Verbauwhede. Aes-based security coprocessor ic in 0.18-um cmos with resistance to differential power analysis side-channel attacks. IEEE Journal of Solid-State Circuits, 41(4):781–792, 2006.
IEEE. IEEE Security in Storage Working Group. IEEE P1619, www.ieee-p1619.wetpaint.com, 2007.
T. Iwata and K. Kurosawa. Omac: One-key cbc mac. In T. Johansson, editor, FSE, LNCS 2887, pages 129–153. Springer, 2003.
H. Kuo and I. Verbauwhede. Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm. In Ç. K. Koç, D. Naccache, and C. Paar, editors, Proceedings of the Second Workshop on Cryptographic Hardware and Embedded Systems — CHES 2001, LNCS 2162, pages 51–65, Springer-Verlag, Berlin, Germany, 2001.
K. Kurosawa and T. Iwata. Tmac: Two-key cbc mac. In M. Joye, editor, CT-RSA, LNCS 2612, pages 33–49. Springer, 2003.
M. Liskov, R. Rivest, and D. Wagner. Tweakable block ciphers. In Advances in Cryptology — CRYPTO ’02, pages 31–46, 2002.
G. Hachëz, F. Koeune, and J.-J. Quisquater. cAESar results: Implementation of four AES candidates on two smart cards. In Proceedings: Second AES Candidate Conference (AES2), Rome, Italy, March 1999.
M. McLoone and J.V. McCanny. High performance single-chip FPGA Rijndael algorithm implementations. In Ç. K. Koç, D. Naccache, and C. Paar, editors, Proceedings of the Second Workshop on Cryptographic Hardware and Embedded Systems — CHES 2001, LNCS 2162, pages 65–76, Springer-Verlag, Berlin, Germany, 2001.
C. H. Meyer and S. M. Matyas. Cryptography: A New Dimension in Computer Data Security. John Wiley & Sons, New York, NY, 1982.
S. Morioka and A. Satoh. An Optimized S-box circuit architecture for low power AES design. In Ç. K. Koç, B.S. Kaliski Jr. and C. Paar, editors, Proceedings of the Second Workshop on Cryptographic Hardware and Embedded Systems — CHES 2002, LNCS 2523, pages 172–186, Springer-Verlag, Berlin, Germany, 2002.
NESSIE. New European Schemes for Signatures, Integrity, and Encryption. http://www.cryptonessie.org.
NIST FIPS PUB 46-3. Data Encryption Standard. Federal Information Processing Standards, National Bureau of Standards, U.S. Department of Commerce, 1977.
NIST Special Publication 800-38C. Recommendation for Block. Cipher Modes of Operation: The. CCM Mode for Authentication. http://csrc.nist.gov. 2004.
NIST Special Publication 800-38D. Recommendation for Block Cipher Modes of Operation: Galois/Counter Mode (GCM) for Confidentiality and Authentication. Federal Information Processing Standards, http://csrc.nist.gov, 2007.
V. Rijmen. Efficient Implementation of the Rijndael S-box, 2001. Available at http://www.esat.kuleuven.ac.be/ rijmen/rijndael/sbox.pdf.
N. Sklavos and O. Koufopavlou. Architectures and VLSI implementations of the AES-proposal Rijndael. IEEE Transactions on Computers, 51(12):1454–1459, December 2002.
S. Tillich and J. Groschdl. Accelerating AES using instruction set extensions for elliptic curve cryptography. In Computational Science and Its Applications - ICCSA 2005, pages 665–675, Springer-Verlag, Berlin, Germany, 2005.
S. Tillich, M. Feldhofer, and J. Großschädl. Area, delay, and power characteristics of standard-cell implementations of the aes s-box. In S. Vassiliadis, S. Wong, and T. Hämäläinen, editors, SAMOS, LNCS 4017, pages 457–466. Springer, 2006.
U.S. Department of Commerce/National Institute of Standard and Technology. FIPS PUB 197, Specification for the Advanced Encryption Standard (AES), November 2001. Available at http://csrc.nist.gov/encryption/aes.
Wei Dai. Crypto++. www.cryptopp.com, 2004.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2010 Springer Science+Business Media, LLC
About this chapter
Cite this chapter
Bertoni, G.M., Melzani, F. (2010). Secret Key Crypto Implementations. In: Verbauwhede, I. (eds) Secure Integrated Circuits and Systems. Integrated Circuits and Systems. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-71829-3_3
Download citation
DOI: https://doi.org/10.1007/978-0-387-71829-3_3
Published:
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-387-71827-9
Online ISBN: 978-0-387-71829-3
eBook Packages: EngineeringEngineering (R0)