Abstract
Random number generators are essential for modern day cryptography. Typically the secret data or function is established through the use of random number generator. It is assumed that the attacker has no access to these a random bits. According to Kerckhoffs’ principles the security of the cryptographic scheme should not depend on the secrecy of the algorithm but rather the secrecy of the key. Hence, in many cryptographic schemes the compromise of the random number generator leads to the collapse of the overall security. As the security of the overall system rests on these secrets, it is natural to set high standards for random number generators that produce them. The random number generator is expected to produce a stream of independent, statistically uniform, and unpredictable random bits. The output should be unpredictable even to the strongest adversary.
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References
Anwendungshinweise und Interpretationen zum Schema (AIS). AIS 32, Version 1, Bundesamt fr Sicherheit in der Informationstechnik, 2001.
V. Bagini and M. Bucci. A design of reliable true random number generator for cryptographic applications. In Ç. K. Koç and C. Paar, editors, Workshop on Cryptographic Hardware and Embedded Systems — CHES 1999, pages 204–218, Berlin, Germany, LNCS 1717, Springer-Verlag, 1999.
B. Barak, R. Shaltiel, and E. Tomer. True random number generators secure in a changing environment. In Ç. K. Koç and C. Paar, editors, Workshop on Cryptographic Hardware and Embedded Systems — CHES 2003, pages 166–180, Berlin, Germany, LNCS 2779, Springer-Verlag, 2003.
M. Bucci and R. Luzzi. Design of testable random bit generators. In J. R. Rao and B. Sunar, editors, Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems – CHES 2005, pages 131–146, LNCS 3659, Springer-Verlag Berlin Heidelberg, August 2005.
S. Callegari, R. Rovatti, and G. Setti. Embeddable ADC-based true random number generator for cryptographic applications exploiting nonlinear signal processing and chaos, IEEE Transaction on Signal Processing, vol. 53, no. 2, pp. 793–805, February 2005.
B. Chor, O. Goldreich, J. Håstad, J. Friedman, S. Rudich, and R. Smolensky. The bit extraction problem or t-resilient functions, 26th IEEE Symposium on Foundations of Computer Science, pages 396–407, 1985.
C. J. Colbourn, J. H. Dinitz, and D. R. Stinson. Applications of combinatorial designs to communications, cryptography and networking, Surveys in Combinatorics, 1999, pages 37–100, British Combinatorial Conference, 1999.
M. Dichtl. How to predict the output of a hardware random number generator. In C. D. Walter, Ç. K. Koç, C. Paar, editors, Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems – CHES 2003, pages 181–188, LNCS 2779, Springer-Verlag Berlin Heidelberg.
M. Dichtl and J. D. Golic. High-speed true random number generation with logic gates only. In P. Paillier and I. Verbauwhede editors, Proceedings of the Cryptographic Hardware and Embedded Systems – CHES 2007, 9th International Workshop, Vienna, Austria, LNCS 4727, pages 45–62, Springer Verlag, September 10–13, 2007.
M. Epstein, L. Hars, R. Krasinski, M. Rosner, and H. Zheng. Design and implementation of a true random number generator based on digital circuit artifacts. In C.D. Walter, Ç. K. Koç, C. Paar, editors, Workshop on Cryptographic Hardware and Embedded Systems — CHES 2003, pages 152–165, LNCS 2779, Springer-Verlag Berlin Heidelberg, 2003.
V. Fischer and M. Drutarovský. True random number generator embedded in reconfigurable hardware. In B. S. Kaliski Jr., Ç. K. Koç, C. Paar, editors, Workshop on Cryptographic Hardware and Embedded Systems — CHES 2002, pages 415–430, Berlin, Germany, LNCS 2523 Springer-Verlag Berlin Heidelberg, 2003.
I. Goldberg and D. Wagner. Randomness in the Netscape Browser. Dr. Dobbs Journal, January 1996.
J. D. Golić. New Paradigms for Digital Generation and post-processing of Random Data, http://eprint.iacr.org/2004/254.ps.
B. Jun and P. Kocher. The Intel random number generator, April 1999. White Paper Prepared for Intel Corporation.
D.E. Knuth. Art of Computer Programming, Volume 2: Seminumerical Algorithms, Addison-Wesley Professional; 3 edition, November 14, 1997.
P. Kohlbrenner and K. Gaj. An embedded true random number generator for FPGAs. International Symposium on Field Programmable Gate Arrays. Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays, pages 71–78, ACM Press, New York, NY, 2004.
G. Marsaglia. DIEHARD: A Battery of Tests of Randomness, http://stat.fsu.edu/pub/diehard/, 1996.
NIST Special Publication 800–22. A Statistical Test Suite for Random and Pseudorandom Numbers. December 2000.
C. W. O’Donnell, G. E. Suh, and S. Devadas. PUF-Based Random Number Generation, MIT CSAIL Technical Memo 481, 2004.
F. Pareschi, G. Setti and R. Rovatti. A fast chaos-based true random number generator for cryptographic applications, Proceedings of 26th European Solid-State circuit Conference (ESSCIRC2006), pages 130–133. Montreux, Switzerland, 19–21 September 2006.
S. Poli, S. Callegari, R. Rovatti, and G. Setti. Post-processing of data generated by a chaotic pipelined ADC for the robust generation of perfectly random bitstreams, Proceedings of ISCAS, vol. IV, pp. 585–588, Vancouver, May 2004.
D. Schellekens, B. Preneel, and I. Verbauwhede. FPGA Vendor Agnostic True Random Number Generator. To appear in the Proceedings of the 16th International Conference on Field Programmable Logic and Applications.
W. Schindler and W. Killmann. Evaluation criteria for true (physical) random number generators used in cryptographic applications. In B. S. Kaliski Jr., Ç. K. Koç, C. Paar, editors, Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems – CHES 2002, pages 431–449, LNCS 2523, Springer-Verlag Berlin Heidelberg, August 2002.
R. A. Schulz. Random number generator circuit. United States Patent, Patent Number 4905176, February 27 1990.
D. R. Stinson and K. Gopalakrishnan. Applications of designs to cryptography. In C.D. Colbourn, and J.H. Dinitz, editors, CRC Handbook of Combinatorial Designs, CRC Press, 1996.
T. Stojanovski and L. Kocarev, Chaos based random number generators Part I: Analysis, IEEE Transaction on Circuits and Systems – I, vol. 48, pp. 281–288, March 2001.
B. Sunar, W. J. Martin, and D. R. Stinson. A provably secure true random number generator with built-in tolerance to active attacks, IEEE Transactions on Computers, vol 58, no 1, pages 109–119, January 2007.
T. E. Tkacik. A hardware random number generator. In B. S. Kaliski Jr., Ç. K. Koç, C. Paar, editors, Workshop on Cryptographic Hardware and Embedded Systems — CHES 2002, pages 450–453, Berlin, Germany, LNCS 2523, Springer-Verlag Berlin Heidelberg, 2003.
True random number service v2.0 beta. www.random.org.
S.-K. Yoo, D. Karakoyunlu, B. Birand and B. Sunar. Improving the Robustness of Ring Oscillator TRNGs, Pre-print: http://ece.wpi.edu/∼sunar/preprints/rings.pdf.
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Sunar, B., Schellekens, D. (2010). Random Number Generators for Integrated Circuits and FPGAs. In: Verbauwhede, I. (eds) Secure Integrated Circuits and Systems. Integrated Circuits and Systems. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-71829-3_6
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DOI: https://doi.org/10.1007/978-0-387-71829-3_6
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