Clustering

Given a gate-level circuit, the goal of circuit clustering is to group gates into clusters and obtain the network of the clusters. The size of the cluster-level network in terms of the number of clusters and the number of connections is smaller than that of the original circuit. A typical objective is to minimize the number of inter-cluster connections (= maximize the number of intra-cluster connections), the maximum number of inter-cluster connections on any path, etc. Typical constraints include the maximum cluster size, the maximum number of external connections for a cluster, etc. The number of clusters to be obtained is not specified, and the area balance among the clusters is usually not required. Circuit clustering is usually performed as a pre-process of circuit partitioning and placement to reduce the complexity of the problem. This chapter presents sample problems related to the following works:

• Rajaraman and Wong algorithm [Rajaraman and Wong, 1995]

• FlowMap algorithm [Cong and Ding, 1992]

• Multi-level Coarsening algorithm [Karypis et al., 1997]

The first two are delay-oriented algorithms, where the longest path delay in the clustered-level circuit is minimized under a certain node/edge delay model. The last is a cutsize-oriented algorithm, where the number of inter-cluster connections is minimized.