Abstract
Transaction level models (TLMs) can be constructed at different levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this contribution. The choice of a level has an impact on simulation accuracy and performance and makes a level suitable for specific use cases, e.g. virtual prototyping, architectural exploration, and verification. Whereas the untimed and cycle-accurate levels have a relatively precise definition, cycle-approximate spans a wide space of modelling alternatives between UT and CA, which makes it a class of levels rather than a single level. In this contribution we review these modelling alternatives in the context of SystemC and with focus on bus models, provide quantitative measurements on major alternatives, and propose a CX modelling level that allows to obtain almost cycle accuracy and a simulation performance significantly above CA models.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
ARM Ltd.: AMBA Specification (Revision 2.0). Document ID: ARM IHI 011A, www.arm.com/products/solutions/AMBA_Spec.html, accessed 7.11.2006.
ARM Ltd.: Cycle Accurate Simulation Interface (CASI). www.arm.com/products/DevTools/Real_ViewESLAPIs.html, accessed 11.10.2006.
L. Cai, D. Gajski: Transaction Level Modeling: An Overview. Proc. CODES + ISSS, 2003.
A. Donlin: Transaction Level Modeling: Flows and Use Models. Proc. CODES + ISSS, 2004.
R. Dömer, A. Gerstlauer, D. Gaijski: SpecC Language Reference Manual (Version 2.0). University of California, Irvine, CA, www.ics.uci.edu/specc/reference/SpecC-LRM_20.pdf, accessed 7.11.2006.
F. Ghenassia (Ed.): Transaction-Level Modeling with SystemC – TLM Concepts and Applications for Embedded Systems. Springer, Dordrecht, 2005.
IEEE Standard 1666–2005: SystemC 2.1 Language Reference Manual. IEEE, 2005.
W. Klingauf, R. Günzel, O. Bringmann, P. Parfuntseu, M. Burton: GreenBus–A Generic Interconnect Fabric for Transaction Level Modelling. Proc. 43rd Design Automation Conference (DAC). San Francisco, CA, 2006.
OCP International Partnership: Open Core Protocol Specification (Release 2.1). www.ocpip.org, 2006.
Open SystemC Initiative: TLM 1.0 API and Library. www.systemc.org, 2005.
M. Radetzki: Object-Oriented Transaction Level Modelling. In S. Huss (Ed.): Advances in Design and Specification Languages for Embedded Systems. Springer, Dordrecht, 2007.
M. Radetzki: Modellierung mit Guarded Transactions zum robusten Entwurf von Hardware-Software-Systemen in SystemC. Proc. 1. GMM/GI/ITG Fachtagung Zuverlässigkeit und Entwurf, München, 2007.
R. Salimi Khaligh, M. Radetzki: Efficient and Extensible Transaction Level Modeling Based on an Object-Oriented Model of Bus Transactions. Proc. Int’l Embedded Systems Symposium (IESS). Irvine, CA, 2007.
G. Schirner, R. Dömer: Fast and Accurate Transaction Level Models using Result Oriented Modeling. Proc. Int’l Conference on Computer Aided Design (ICCAD). San Jose, CA, 2006.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2008 Springer Science + Business Media B.V
About this chapter
Cite this chapter
Radetzki, M., Khaligh, R.S. (2008). On Construction of Cycle Approximate Bus TLMs. In: Villar, E. (eds) Embedded Systems Specification and Design Languages. Lecture Notes in Electrical Engineering, vol 10. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-8297-9_3
Download citation
DOI: https://doi.org/10.1007/978-1-4020-8297-9_3
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-8296-2
Online ISBN: 978-1-4020-8297-9
eBook Packages: EngineeringEngineering (R0)