Abstract
In this chapter we discuss the design, implementation and functionality of the PowerPC Processing Element (PPE), which serves as the control plane of the Cell Broadband Engine; the OS of the Cell runs on the PPE. The PPE contains a 64-bit, dual-thread PowerPC Architecture RISC core and supports a PowerPC virtualmemory subsystem. It has a 32 KB L1 I-cache, as well as a 32 KB D-cache, along with a 512 KB L2 unified cache. We analyze the PPE in detail, as not only does it provide significant facilities for controlling the SPEs, the PPE in Cell can run existing PowerPC 970MP and 970FX compiled applications. Since PowerPC is often used as a control processor in embedded systems, we use the PPE in Cell to understand PowerPC instruction set in detail. The PPE in Cell includes the vector/SIMD multimedia extensions (AltiVec).
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© 2009 Springer Science+Business Media, LLC
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Koranne, S. (2009). The Power Processing Element (PPE). In: Practical Computing on the Cell Broadband Engine. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-0308-2_2
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DOI: https://doi.org/10.1007/978-1-4419-0308-2_2
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Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-0307-5
Online ISBN: 978-1-4419-0308-2
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