Abstract
The dynamic instruction counts of MIPS and SPARC are compared using the SPEC benchmarks. MIPS typically executes more user-level instructions than SPARC. This difference can be accounted for by architectural differences, compiler differences, and library differences. The most significant differences are that SPARC’S double-precision floating-point load/store is an architectural advantage in the SPEC floating-point benchmarks, while MIPS’s compare-and-branch instruction is an architectural advantage in the SPEC integer benchmarks. After the differences in the two architectures are isolated, it appears that although MIPS and SPARC each have strengths and weaknesses in their compliers and library routines, the combined effect of compilers and library routines does not give either MIPS or SPARC a clear advantage in these areas.
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© 1991 Sun Microsystems, Inc.
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Cmelik, R.F., Kong, S.I., Ditzel, D.R., Kelly, E.J. (1991). An Analysis of MIPS and SPARC Instruction Set Utilization on the SPEC Benchmarks. In: Catanzaro, B.J. (eds) The SPARC Technical Papers. Sun Technical Reference Library. Springer, New York, NY. https://doi.org/10.1007/978-1-4612-3192-9_32
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DOI: https://doi.org/10.1007/978-1-4612-3192-9_32
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