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Automated Generation of Directed Tests

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System-Level Validation

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Abstract

Due to the increasing complexity coupled with limited time-to-market, functional validation is becoming a major bottleneck in SoC design. Directed testing is recognized as a promising simulation-based validation method, since only a small set of directed tests is required to achieve the desired coverage. However, currently most direct test generation needs human intervention, which is time-consuming and error-prone. Based on the property falsification, this chapter presents a model checking based approach, which can automatically generate directed tests from the SoC models and specifications.

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Notes

  1. 1.

    A safety property asserts that a specified scenario can never happen. A false safety property is a safety property which can be proved to be false.

  2. 2.

    In conventional LTL formulas, the sign “\(\lnot \)” denotes the negation. For the real property checking, both notations “\(\sim \)” and “\(!\)” are used to indicate the negation of properties and expressions, respectively.

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Authors and Affiliations

  1. Software Engineering Institute, East China Normal University, Shanghai, 200062, People’s Republic of China

    Mingsong Chen

  2. Department of Computer and Information Science and Engineering, University of Florida, Gainsville, FL, 32611, USA

    Xiaoke Qin & Prabhat Mishra

  3. Intel corporation, Santa, CA, USA

    Heon-Mo Koo

Authors
  1. Mingsong Chen
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  2. Xiaoke Qin
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  3. Heon-Mo Koo
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  4. Prabhat Mishra
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Correspondence to Mingsong Chen .

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Chen, M., Qin, X., Koo, HM., Mishra, P. (2013). Automated Generation of Directed Tests. In: System-Level Validation. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-1359-2_3

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  • DOI: https://doi.org/10.1007/978-1-4614-1359-2_3

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