Abstract
Logic synthesis has been worked on for at least 40 years, and much has been accomplished, with many commercial tools developed and used pervasively. However, in light of the continual progress made in technology, more complex designs will be made and along with increased physical interactions, these will present new challenges for both synthesis and verification. We discuss some areas where these problems will arise and pose some challenges for the future.
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Brayton, R.K. (2002). The Future of Logic Synthesis and Verification. In: Hassoun, S., Sasao, T. (eds) Logic Synthesis and Verification. The Springer International Series in Engineering and Computer Science, vol 654. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0817-5_15
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DOI: https://doi.org/10.1007/978-1-4615-0817-5_15
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