Abstract
In this work, we demonstrate an implementation of Deep Convolution Generative Adversarial Network (DCGAN), into a Field Programmable Gate Array (FPGA). In order to implement the DCGAN, we modified the DCGAN model with binary weights and activations, and with using integer-valued operations in the forwarding path (train-time and run-time). We call the modified one as Binary-DCGAN (B-DCGAN). Using the B-DCGAN, we do a feasibility study of FPGA’s characteristics and performance for Deep Learning. Because the binarization and using integer-valued operation reduce the memory capacity and the number of the circuit gates, it is very effective for FPGA implementation. On the other hand, these reductions in the model might decrease the quality of the generated data. So we investigate the influence of these reductions.
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Acknowledgements
We would like to thank the UEC Shouno lab (http://daemon.inf.uec.ac.jp/ja/) members: Satoshi Suzuki and Aiga Suzuki for theoretical and technical discussion; Seigo Kawamura, Kurosaka Mamoru, Yoshihiro Kusano, Toya Teramoto and Akihiro Endo for kind technical assistance and humor. We thank Kazuhiko Yoshihara and all the members of Open Stream, Inc. We also thank the developers of Theano, Lasagne, and Python environment. This work is supported under the funds of Open Stream, Inc. (https://www.opst.co.jp/).
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Terada, H., Shouno, H. (2019). B-DCGAN: Evaluation of Binarized DCGAN for FPGA. In: Gedeon, T., Wong, K., Lee, M. (eds) Neural Information Processing. ICONIP 2019. Lecture Notes in Computer Science(), vol 11953. Springer, Cham. https://doi.org/10.1007/978-3-030-36708-4_5
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DOI: https://doi.org/10.1007/978-3-030-36708-4_5
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