Abstract
We present a novel method allowing one to approximate complex arithmetic circuits with formal guarantees on the worst-case relative error, abbreviated as WCRE. WCRE represents an important error metric relevant in many applications including, e.g., approximation of neural network HW architectures. The method integrates SAT-based error evaluation of approximate circuits into a verifiability-driven search algorithm based on Cartesian genetic programming. We implement the method in our framework ADAC that provides various techniques for automated design of arithmetic circuits. Our experimental evaluation shows that, in many cases, the method offers a superior scalability and allows us to construct, within a few hours, high-quality approximations (providing trade-offs between the WCRE and size) for circuits with up to 32-bit operands. As such, it significantly improves the capabilities of ADAC.
This work has been partially supported by the Brno Ph.D. Scholarship Program, the Czech Science Foundation (project No. 19-24397S), the IT4Innovations Excellence in Science (project No. LQ1602), and the FIT BUT internal project FIT-S-17-4014.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Notes
- 1.
We estimate the area as the sum of sizes of the gates (in the target 45 nm technology) used in the circuit. The estimation tends to be accurate and also adequately captures the circuit power consumption [9].
References
Češka, M., Matyáš, J., Mrazek, V., Sekanina, L., Vasicek, Z., Vojnar, T.: ADAC: automated design of approximate circuits. In: Chockler, H., Weissenbacher, G. (eds.) CAV 2018. LNCS, vol. 10981, pp. 612–620. Springer, Cham (2018). https://doi.org/10.1007/978-3-319-96145-3_35
Chandrasekharan, A., et al.: Precise error determination of approximated components in sequential circuits with model checking. In: DAC 2016. IEEE (2016)
Chippa, V.K., et al.: Analysis and characterization of inherent application resilience for approximate computing. In: DAC 2013. ACM (2013)
Ciesielski, M., et al.: Verification of gate-level arithmetic circuits by function extraction. In: DAC 2015. ACM (2015)
Judd, P., Albericio, J., et al.: Proteus: exploiting numerical precision variability in deep neural networks. In: ICS 2016, pp. 1–12 (2016)
Miller, J.F., Thomson, P.: Cartesian genetic programming. In: Poli, R., Banzhaf, W., Langdon, W.B., Miller, J., Nordin, P., Fogarty, T.C. (eds.) EuroGP 2000. LNCS, vol. 1802, pp. 121–132. Springer, Heidelberg (2000). https://doi.org/10.1007/978-3-540-46239-2_9
Mrazek, V., et al.: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods. In: DATE 2017 (2017)
Vasicek, Z., Sekanina, L.: Circuit approximation using single- and multi-objective cartesian GP. In: Machado, P., et al. (eds.) EuroGP 2015. LNCS, vol. 9025, pp. 217–229. Springer, Cham (2015). https://doi.org/10.1007/978-3-319-16501-1_18
Vasicek, Z., et al.: Towards low power approximate DCT architecture for HEVC standard. In: DATE 2017, pp. 1576–1581. IEEE (2017)
Češka, M., et al.: Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished. In: ICCAD 2017, pp. 416–423 (2017)
Venkataramani, S., et al.: SALSA: systematic logic synthesis of approximate circuits. In: DAC 2012, pp. 796–801. ACM (2012)
Venkataramani, S., et al.: Substitute-and-simplify: a unified design paradigm for approximate and quality configurable circuits. In: DATE 2013. EDA (2013)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2020 Springer Nature Switzerland AG
About this paper
Cite this paper
Češka jr., M., Češka, M., Matyáš, J., Pankuch, A., Vojnar, T. (2020). Approximating Complex Arithmetic Circuits with Guaranteed Worst-Case Relative Error. In: Moreno-Díaz, R., Pichler, F., Quesada-Arencibia, A. (eds) Computer Aided Systems Theory – EUROCAST 2019. EUROCAST 2019. Lecture Notes in Computer Science(), vol 12013. Springer, Cham. https://doi.org/10.1007/978-3-030-45093-9_58
Download citation
DOI: https://doi.org/10.1007/978-3-030-45093-9_58
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-45092-2
Online ISBN: 978-3-030-45093-9
eBook Packages: Computer ScienceComputer Science (R0)