Operational Amplifiers

Abstract

The operational amplifier or op-amp is one of the most widely used linear integrated circuits today. Its great popularity arises from its versatility, usefulness, low cost and ease of use. It was introduced in the 1940s mainly for use in analog computers where it performed mathematical operations (hence the name) including addition, multiplication, integration and differentiation. The device later found ready application in a wide range of circuits and functions, many of which will be discussed in this chapter. At the end of the chapter, the student will be able to:

Problems

• 1. For each of the circuits shown in Fig. 8.81, determine V_o.

• 2. Design an inverting amplifier with a voltage gain of −5.

• 3. Design an inverting amplifier with a voltage gain of −8 and an input resistance of 10 k.

• 4. Design a non-inverting amplifier with a voltage gain of 8.

• 5. Design a non-inverting amplifier with a voltage gain of 8 and an input resistance of 150 kΩ.

• 6. A non-inverting amplifier has R₁ = 5 k and R₂ = 25 k. Determine the gain of the system.

• 7. Configure an op-amp circuit to realize the operation V_O = 5 V₁ − 2 V₂. If a third input was added to the differential amplifier such that V_O = 5 V₁ ‐ 2 V₂ + 3 V₃, realize such a circuit using a single op-amp.

• 8. Design a non-inverting amplifier with a gain of 12 using an op-amp that operates from a single-ended 15 V supply.

• 9. Design an inverting amplifier with a gain of −9 using an op-amp that operates from a single-ended 18 V supply.

• 10. Show that the closed-loop bandwidth of a unity-gain stable op-amp is equal to the open-loop bandwidth multiplied by the loop gain. Such an operational amplifier has a GBP = 20 MHz. Determine the closed-loop bandwidth for gains of (i) 10 and (ii) 50.

• 11. A (unity-gain stable) op-amp has a GBP = 8 MHz. Determine the gain for a bandwidth of 1 MHz.

• 12. A (unity-gain stable) op-amp has an open-loop bandwidth of 20 Hz and a low-frequency open-loop gain of 120 dB. Determine the gain bandwidth product of the device.

• 13. A particular op-amp has an input resistance R_i = 1 M, R_o = 100 Ω and open-loop DC gain A_o = 2000. Estimate the error in the gain of this op-amp if used as an inverting amplifier, when R₁ = 1 k and R₂ = 10 k. Repeat for the case R₁ = 1 M and R₂ = 10 M. Which choice of resistors results in a lower gain error while maintaining the same gain?

• 14. For the transimpedance amplifier of Fig. 8.82, show that the input impedance as seen to the right of the source is given by R_i = R₂/(1 + A_o). If R₂ = 10 k and A_o = 1000, determine the range of R_s such that the output voltage V_o deviates from its ideal value by 1%.

• 15. The circuit shown in Fig. 8.83 contains a floating load and has the characteristics of an ideal current amplifier. Show that for this circuit i_o and i_i are related by ${i}_o=-\left(1+\frac{R_1}{R_2}\right){i}_i$. Determine the input impedance as seen at the inverting terminal of this amplifier.

• 16. Consider the variable gain difference amplifier shown in Fig. 8.84 where resistor R_G is used to change the gain. Show for this amplifier, the output voltage is given by

  $$ {V}_o=\frac{2{R}_2}{R_1}\left(1+\frac{R_2}{R_G}\right)\left({V}_2-{V}_1\right) $$

• 17. An ideal CFA has Z_o = 5 M and f_o = 1 kHz. Determine the closed-loop gain and closed-loop bandwidth in the inverting and non-inverting configurations for R₁ = 1 k and R₂ = 10 k.

• 18. An op-amp has a slew rate of 5 V/μs and a maximum output voltage swing of ±8 V. Determine the full power bandwidth BW_p. What is the maximum voltage output the device can deliver at 500 kHz?

• 19. A CFA has the characteristics f_o = 7.5 kHz, Z_o = 4.5 M and r_x = 50 Ω. Determine the value of the feedback resistor R₂ in order to achieve a closed-loop bandwidth of 10 MHz. For this value of feedback resistor in the inverting configuration, determine the value of the input resistor R₁ in order to achieve a gain of −10.

Fig. 8.81

Circuits for Question 1

Fig. 8.82

Circuit for Question 14

Fig. 8.83

Circuit for Question 15

Fig. 8.84

Circuit for Question 16