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Empowering SysML-Based Software Architecture Description with Formal Verification: From SysADL to CSP

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Software Architecture (ECSA 2020)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 12292))

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Abstract

Software architecture description languages (ADLs) currently adopted by industry for software-intensive systems are largely semi-formal and essentially based on SysML and specialized profiles. Despite these ADLs allow describing both structure and behavior of the architecture, there is no guarantee regarding the satisfaction of correctness properties. Due to their nature, semi-formal ADLs do not support automated verification of the specified properties, in particular those related to safety and liveness of the specified behavior. This paper proposes a novel approach for empowering SysML-based ADLs with formal verification support founded on model checking. It presents (i) how the semantics of SysADL, a SysML-based ADL, can be formalized in terms of the CSP process calculus, (ii) how correctness properties can be formally specified in CSP, and (iii) how the FDR4 refinement checker allows verifying correctness properties through model checking. The automated model transformation from SysADL architecture descriptions to CSP composite processes has been implemented as a plug-in to the Eclipse-based SysADL Studio tool. This paper also describes an application of SysADL empowered with CSP to validate its usefulness in practice.

This research was partially funded by INES 2.0, FACEPE grant APQ-0399-1.03/17, CAPES grant 88887.136410/2017-00, and CNPq grant 465614/2014-0.

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Notes

  1. 1.

    CSP files and the extended SysADL Studio are available at http://bit.ly/2PAqYiD.

  2. 2.

    For the sake of conciseness, parts of the specification are omitted. The complete version can be found at http://bit.ly/2PAqYiD.

  3. 3.

    The translation is implemented in Acceleo (http://www.eclipse.org/acceleo/).

  4. 4.

    Available at http://sysadl.org.

  5. 5.

    A short demo is available at https://youtu.be/vlchTK3fk2Y.

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Authors and Affiliations

  1. DIMAp, Federal University of Rio Grande do Norte, Natal, Brazil

    Fagner Dias, Marcel Oliveira, Thais Batista, Everton Cavalcante, Jair Leite & Camila Araújo

  2. IRISA-UMR CNRS/Université Bretagne Sud, Vannes, France

    Flavio Oquendo

  3. State University of Rio Grande do Norte, Natal, Brazil

    Camila Araújo

Authors
  1. Fagner Dias
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  2. Marcel Oliveira
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  3. Thais Batista
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  4. Everton Cavalcante
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  5. Jair Leite
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  6. Flavio Oquendo
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  7. Camila Araújo
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Corresponding author

Correspondence to Marcel Oliveira .

Editor information

Editors and Affiliations

  1. Koninklijke Philips N.V., Eindhoven, The Netherlands

    Anton Jansen

  2. VU Amsterdam, Amsterdam, The Netherlands

    Ivano Malavolta

  3. University of L’Aquila, L’Aquila, Italy

    Henry Muccini

  4. Carnegie Mellon University, Pittsburg, PA, USA

    Ipek Ozkaya

  5. University of Applied Sciences of Eastern Switzerland, Rapperswil, Switzerland

    Olaf Zimmermann

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Dias, F. et al. (2020). Empowering SysML-Based Software Architecture Description with Formal Verification: From SysADL to CSP. In: Jansen, A., Malavolta, I., Muccini, H., Ozkaya, I., Zimmermann, O. (eds) Software Architecture. ECSA 2020. Lecture Notes in Computer Science(), vol 12292. Springer, Cham. https://doi.org/10.1007/978-3-030-58923-3_7

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  • DOI: https://doi.org/10.1007/978-3-030-58923-3_7

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-58922-6

  • Online ISBN: 978-3-030-58923-3

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