Abstract
As discussed in previous chapters, 3D ICs require both pre-bond and post-bond testing to ensure stack yield. The goal of pre-bond testing is to ensure that only known good die (KGD) are bonded together to form a stack. Post-bond test ensures the functionality of the complete stack and screens for defects introduced in alignment and bonding.
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Noia, B., Chakrabarty, K. (2014). Overcoming the Timing Overhead of Test Architectures on Inter-Die Critical Paths. In: Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs. Springer, Cham. https://doi.org/10.1007/978-3-319-02378-6_6
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