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A Selection of Lower Bounds for Arithmetic Circuits

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Perspectives in Computational Complexity

Part of the book series: Progress in Computer Science and Applied Logic ((PCS,volume 26))

Abstract

This article is a survey of techniques used in arithmetic circuit lower bounds.

It is convenient to have a measure of the amount of work involved in a computing process, even though it may be a very crude one ...We might, for instance, count the number of additions, subtractions, multiplications, divisions, recordings of numbers,... from Rounding-off errors in matrix processes, Alan M. Turing, 1948

To Somenath Biswas, on his 60th Birthday.

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Notes

  1. 1.

    One can also allow more arithmetic operations such as division and square roots. It turns out, however, that one can efficiently simulate any circuit with divisions and square roots by another circuit without these operations while incurring only a polynomial factor increase in size.

  2. 2.

    A more specialized survey by Chen, Kayal, and Wigderson [CKW11] focuses on the applications of partial derivatives in understanding the structure and complexity of polynomials.

  3. 3.

    in the sense that any polynomial can be computed in this model albeit of large size.

  4. 4.

    such circuits are also called diagonal depth- \(3\) circuits in the literature.

  5. 5.

    It is a forklore result that any circuit can be homogenized with just a polynomial blowup in size. Further, this process also preserves monotonicity of the circuit. A proof of this may be seen in [SY10].

  6. 6.

    The binary entropy function is defined as \(H(\gamma ) \mathop {=}\limits ^{\text {def}}-\gamma \log _2(\gamma ) - (1-\gamma )\log _2(1-\gamma )\). It is well known that \(\left( {\begin{array}{c}n\\ k\end{array}}\right) \approx 2^{nH(k/n)}\).

  7. 7.

    provided the underlying field is large, but this isn’t really a concern as we can work with a large enough extension if necessary.

  8. 8.

    Some of the complexity measures that we describe here yield lower bounds for slightly more general subclasses of circuits.

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Authors and Affiliations

  1. Microsoft Research, Bangalore, 560001, India

    Neeraj Kayal & Ramprasad Saptharishi

Authors
  1. Neeraj Kayal
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  2. Ramprasad Saptharishi
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Correspondence to Neeraj Kayal .

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Editors and Affiliations

  1. Department of Computer Science and Engineering, Indian Institute of Technology, Kanpur, India, Kanpur, India

    Manindra Agrawal

  2. CIT Campus, Institute of Mathematical Sciences, Chennai, India

    Vikraman Arvind

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Kayal, N., Saptharishi, R. (2014). A Selection of Lower Bounds for Arithmetic Circuits. In: Agrawal, M., Arvind, V. (eds) Perspectives in Computational Complexity. Progress in Computer Science and Applied Logic, vol 26. Birkhäuser, Cham. https://doi.org/10.1007/978-3-319-05446-9_5

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