Abstract
In this chapter, we present our off-chip debugger software called the CSAR debug environment (CSARDE). The goal of the CSARDE is to provide an effective, efficient and extensible debug environment to debug an SOC using the CSAR debug approach. In Sect. 7.1, we give an overview of the requirements for the CSARDE, its software architecture, and the main design patterns used in its implementation. We subsequently present details on its four main software components: (1) the SOC manager, (2) the abstraction manager, (3) the scripting engine, and (4) the user interfaces in Sects. 7.2–7.5. We conclude this chapter with a summary in Sect. 7.6.
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Notes
- 1.
With the term user we refer to both the debug engineer as well as the software components of the CSARDE.
- 2.
transmission control protocol over internet protocol
- 3.
universal serial bus to test access port
- 4.
We use the Java regular expression library [2] to provide the regular expression matching functionality.
- 5.
Note that with this technique it is trivial to return even more descriptive state names, for example the original FSM VHDL or Verilog state names.
References
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Vermeulen, B., Goossens, K. (2014). Off-Chip Debugger Software. In: Debugging Systems-on-Chip. Embedded Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-06242-6_7
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DOI: https://doi.org/10.1007/978-3-319-06242-6_7
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