Abstract
In this chapter, the problem of designing PID type-III control loops is investigated. On a theoretical basis and if frequency domain modeling is followed, type-III control loops are characterized by the presence of three pure integrators in the open loop transfer function, see Sect. 2.1. Therefore, such a control scheme has the advantage of tracking fast reference signals since it exhibits zero steady state position, velocity and acceleration error, see Sect. 2.1. This advantage is considered critical in many industry applications, i.e. control of electrical motor drives, control of power converters, since it allows the output variable, i.e., DC-link voltage or speed, to track perfectly step, ramp and parabolic reference signals. In a similar fashion, with Chaps. 3 and 4, the proposed PID control law (1) consists of analytical expressions that involve all modeled process parameters (2) can be straightforward applied to any process regardless of its complexity since for its development a generalized transfer function process model is employed consisting of \(n\)-poles, \(m\)-zeros plus unknown time delay-\(d\) (3) allows for accurate investigation of the performance of the control action to exogenous and internal disturbances in the control loop, investigation of different operating points. For justifying the potential of the proposed control law, several examples of process models met in many industry applications are investigated.
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Papadopoulos, K.G. (2015). Type-III Control Loops. In: PID Controller Tuning Using the Magnitude Optimum Criterion. Springer, Cham. https://doi.org/10.1007/978-3-319-07263-0_5
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DOI: https://doi.org/10.1007/978-3-319-07263-0_5
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