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Graphene for Silicon Microelectronics: Ab Initio Modeling of Graphene Nucleation and Growth

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Low-Dimensional and Nanostructured Materials and Devices

Part of the book series: NanoScience and Technology ((NANO))

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Abstract

Graphene electronics is expected to complement the conventional Si technologies. Graphene processing should thus be compatible with the mainstream Si technology: CMOS . Ideally, it should be possible to grow graphene directly on a Si wafer, but this does not work. Large area graphene can be grown on Cu or on Ni, its transfer to silicon must then follow, which is problematic. Researchers try therefore to grow graphene on CMOS compatible substrates, such as on Ge/Si(001) wafers. Ab initio modeling , particularly when used in combination with experimental data, can elucidate the mechanisms that govern the process of nucleation and growth of graphene, and thus provide assistance in the design of experiments and production processes. We overview our results in this context, startig from atomic C deposited on (chemically inert) graphene, through the similar cases of Si deposited on graphene and C deposited on hexagonal boron nitride, and the case of carbon on a non-inert insulator (SiO2-like surface of mica) , up to C atoms and hydrocarbon molecules building graphene on Ge(001) surfaces.

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Notes

  1. 1.

    Derived means here “using the same set but taken from Brillouin zone of a larger surface cell”. This is done with caution, as it costs computing time. For example, calculation using the \( \varGamma \) point from the 24 × 24 cell of graphene (this is a fully converged k-point set) requires 10 times more wall time (or 10 times more cores if the same wall time is requested) than the standard calculation done with the \( \varGamma \) point from the 6 × 6 cell (this is a poor set for adsorption energies, but a reasonable one for diffusion barriers). Therefore, the structures are computed using the fundamental k-point set and only in the most interesting cases refined using the fully converged set.

  2. 2.

    This ignores the probability that two ad-atoms find one another; for full treatment, see Fig. 8.5a.

  3. 3.

    Figure 8.5a includes the probability that two ad-atoms find one another on the surface.

  4. 4.

    PMMA is the polymer used during graphene transfer from Cu to the target wafer.

  5. 5.

    The 2D/G ratio is not the only criterion here, and it is not the absolute one. For more discussion, see [10] (the case of MBE graphene on Ge) and references therein.

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Acknowledgments

The authors wish to dedicate this work to the memory of Prof. Wolfgang Mehr, the inventor and the pioneer of research on graphene base transistors. We thank our IHP colleagues: Yuji Yamamoto for CVD growth of Ge(001) films on Si wafers, Oksana Fursenko for taking AFM images, Markus Schubert for TEM and EDX characterization, Julia Kitzmann for graphene transfer, Thomas Schroeder for discussions, ideas, and encouragement, and Andre Wolff for technology support. Financial support from the European Commission through the GRADE project (No. 317839) and computing time support from the Jülich Supercomputing Center of the John von Neumann Institute for Computing (project hfo06) are gratefully acknowledged.

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Authors and Affiliations

  1. IHP, Im Technologiepark 25, 15236, Frankfurt(Oder), Germany

    Jarek Dabrowski, Gunther Lippert & Grzegorz Lupina

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  1. Jarek Dabrowski
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  2. Gunther Lippert
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  3. Grzegorz Lupina
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Correspondence to Jarek Dabrowski .

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Editors and Affiliations

  1. Department of Physics Engineering, Faculty of Science and Letters,, Istanbul Technical University, Istanbul, Türkiye

    Hilmi Ünlü

  2. Department of Physics and Engineering Physics, Stevens Institute of Technology, Hoboken, NJ, USA

    Norman J. M. Horing

  3. Leibniz-Inst. für innovative Mikroelektr, Innovations for High Performance Microelectronics (IHP) GmbH, Frankfurt, Germany

    Jaroslaw Dabrowski

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Dabrowski, J., Lippert, G., Lupina, G. (2016). Graphene for Silicon Microelectronics: Ab Initio Modeling of Graphene Nucleation and Growth. In: Ünlü, H., Horing, N.J.M., Dabrowski, J. (eds) Low-Dimensional and Nanostructured Materials and Devices. NanoScience and Technology. Springer, Cham. https://doi.org/10.1007/978-3-319-25340-4_8

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