Abstract
The high complexity of the modern SoC designs ([17]) raises the serious verification challenges. The design verification becomes even more critical because of the constantly shrinking project timescales due to the time to market pressure. The hardware platform based verification is the only one that can cope with the increasing SoC complexity: only in hardware, complex test sequences exercising the complete design can run at a reasonable speed. This paper presents how both emulation and rapid FPGA-based prototyping technologies are deployed in a complementary way in a real industrial environment. Taking two latest highly complex SoC projects as an illustration (3 and 4 million ASIC gates without counting memories), we will describe the integral hardware platform based validation approach. The deployed methodology resulted in a success story for both emulation and rapid prototyping projects for both SoCs.
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Bigot, A., Charpentier, F., Krupnova, H., Sans, I. (2004). Deploying Hardware Platforms for SoC Validation: An Industrial Case Study. In: Becker, J., Platzner, M., Vernalde, S. (eds) Field Programmable Logic and Application. FPL 2004. Lecture Notes in Computer Science, vol 3203. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30117-2_9
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DOI: https://doi.org/10.1007/978-3-540-30117-2_9
Publisher Name: Springer, Berlin, Heidelberg
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