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Input Register Architectures of High Speed Router for Supporting the PHB of Differentiated Services

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Quality of Service in Multiservice IP Networks (QoS-IP 2004)

Part of the book series: Lecture Notes in Computer Science ((LNCCN,volume 3375))

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Abstract

In this paper, we presents a new router architecture for supporting the Differentiated Services(DiffServ) in the input-registered router, which has multiple Virtual Output Registers(VORs) for buffering packets ahead of the non-blocking switching fabric. A queuing discipline function block needed on the DiffServ router is added in the input-registered router in order to support Per-Hop Behaviors(PHBs) of DiffServ. Also a new matching algorithm, First Scheduled First Matching (FSFM), is considered to match input packets and output ports in the proposed VOR architecture. The simulation results by using ARENA show that the proposed architecture offer packet loss rate and delay close to the results of output-queued router with N time speed-up switch fabric in various PHBs on DiffServ.

This research was supported by University IT Research Center Project.

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© 2005 Springer-Verlag Berlin Heidelberg

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Youm, S., Seok, SJ., Lee, SJ., Kang, CH. (2005). Input Register Architectures of High Speed Router for Supporting the PHB of Differentiated Services. In: Ajmone Marsan, M., Bianchi, G., Listanti, M., Meo, M. (eds) Quality of Service in Multiservice IP Networks. QoS-IP 2004. Lecture Notes in Computer Science, vol 3375. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30573-6_50

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  • DOI: https://doi.org/10.1007/978-3-540-30573-6_50

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-24557-5

  • Online ISBN: 978-3-540-30573-6

  • eBook Packages: Computer ScienceComputer Science (R0)

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