Abstract
We present complexity hierarchies on circuits under two DLOGTIME-uniformity conditions. It is shown that there is a language which can be recognized by a family of \(U_{\mbox{\tiny E}}\)-uniform circuits of depth \(d(1+\epsilon)(\log n)^{r_1}\) and size \(n^{r_2(1+\epsilon)}\) but not by any family of \(U_{\mbox{\tiny E}}\)-uniform circuits of depth \(d(\log n)^{r_1}\) and size \(n^{r_2}\), where ε> 0, d>0, r 1>1, and r 2≥1 are arbitrary rational constants. It is also shown that there is a language which can be recognized by a family of \(U_{\mbox{\tiny D}}\)-uniform circuits of depth (1+o(1))t(n)log z(n) and size (16t(n)+ψ(n)(log z(n))2)(z(n))2 but not by any family of \(U_{\mbox{\tiny D}}\)-uniform circuits of depth t(n) and size z(n), where ψ(n) is an arbitrary slowly growing function not bounded by O(1).
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References
Ajtai, M.: ∑\(^1_1\)-formulae on finite structure. Ann. Pure Appl. Logic 24, 1–48 (1983)
Cook, S.A.: A hierarchy for nondeterministic time complexity. J. Comput. System Sci. 7, 343–353 (1973)
Cook, S.A., Hoover, H.J.: A depth-universal circuit. SIAM J. Comput. 14(4), 833–839 (1985)
Cook, S.A., Reckhow, R.A.: Time bounded random access machines. J. Comput. System Sci. 7, 354–375 (1973)
Fürer, M.: The tight deterministic time hierarchy. In: Proc. 14th Annual ACM Symp. on Theory of Computing, San Francisco, California, pp. 8–16 (1982)
Furst, M., Saxe, J., Sipser, M.: Parity, circuits, and the polynomial time hierarchy. Math. Systems Theory 17, 12–27 (1984)
Hartmanis, J., Lewis II, P.M., Stearns, R.E.: Hierarchies of memory limited computations. In: Proc. 6th Annual IEEE Symp. on Switching Circuit Theory and Logical Design, pp. 179–190 (1965)
Hartmanis, J., Stearns, R.E.: On the computational complexity of algorithms. Trans. Amer. Math. Soc. 117, 285–306 (1965)
Ibarra, O.H.: A hierarchy theorem for polynomial-space recognition. SIAM J. Comput. 3(3), 184–187 (1974)
Ibarra, O.H., Kim, S.M., Moran, S.: Sequential machine characterizations of trellis and cellular automata and applications. SIAM J. Comput. 14(2), 426–447 (1985)
Ibarra, O.H., Sahni, S.K.: Hierarchies of Turing machines with restricted tape alphabet size. J. Comput. System Sci. 11, 56–67 (1975)
Iwama, K., Iwamoto, C.: Parallel complexity hierarchies based on PRAMs and DLOGTIME-uniform circuits. In: Proc. IEEE Conf. on Computational Complexity, Philadelphia, pp. 24–32 (1996)
Iwamoto, C.: Complexity hierarchies on circuits under restricted uniformities, Kuwait (2000) (presentation at ICCI)
Iwamoto, C., Hatsuyama, T., Morita, K., Imai, K.: Constructible functions in cellular automata and their applications to hierarchy results. Theoret. Comput. Sci. 270, 797–809 (2002)
Iwamoto, C., Iwama, K.: Time complexity hierarchies of extended TMs for parallel computation. IEICE Trans. Inf. and Syst. J80-D-I 5, 421–427 (1997) (in Japanese)
Iwamoto, C., Margenstern, M.: Time and space complexity classes of hyperbolic cellular automata. IEICE Trans. on Inf. and Syst. E87-D(3), 265–273 (2004)
Kirchherr, W.W.: A hierarchy theorem for PRAM-based complexity classes. In: Kumar, S., Nori, K.V. (eds.) FSTTCS 1988. LNCS, vol. 338, pp. 240–249. Springer, Heidelberg (1988)
Paul, W.J.: On time hierarchies. J. Comput. System Sci. 19, 197–202 (1979)
Ruzzo, W.L.: On uniform circuit complexity. J. Comput. System Sci. 22, 365–383 (1981)
Sipser, M.: Borel sets and circuit complexity. In: Proc. 15th Annual ACM Symp. on Theory of Computing, Boston, Massachusetts, pp. 61–69 (1983)
Žák, S.: A Turing machine space hierarchy, Kybernetika, vol. 26(2), pp. 100–121 (1979)
Žák, S.: A Turing machine time hierarchy. Theoret. Comput. Sci. 26, 327–333 (1983)
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Iwamoto, C., Hatayama, N., Morita, K., Imai, K., Wakamatsu, D. (2005). Hierarchies of DLOGTIME-Uniform Circuits. In: Margenstern, M. (eds) Machines, Computations, and Universality. MCU 2004. Lecture Notes in Computer Science, vol 3354. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-31834-7_17
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DOI: https://doi.org/10.1007/978-3-540-31834-7_17
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