Abstract
This paper presents a new co-simulation framework supporting system level power estimation. The goal of this work is to support precise power estimation in the early design stage. The proposed co-simulation provides a guideline to reduce the power dissipation for a SoC design. This approach resulted in energy saving of 61% for redesigned medium access control processors while code size increased by 14%. The accuracy of the power estimation obtained from the proposed framework was around 94.9%. The contribution of the proposed framework was a straightforward method to merge system level power estimation techniques into the system level design environment.
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Batsuuri, T., Lee, JH., Cho, KR. (2007). Power Efficient Co-simulation Framework for a Wireless Application Using Platform Based SoC. In: Vassiliadis, S., Bereković, M., Hämäläinen, T.D. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2007. Lecture Notes in Computer Science, vol 4599. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-73625-7_38
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DOI: https://doi.org/10.1007/978-3-540-73625-7_38
Publisher Name: Springer, Berlin, Heidelberg
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