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FPGA Implementation of a Feature Detection and Tracking Algorithm for Real-time Applications

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Advances in Visual Computing (ISVC 2007)

Part of the book series: Lecture Notes in Computer Science ((LNIP,volume 4841))

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Abstract

An efficient algorithm to detect, correlate, and track features in a scene was implemented on an FPGA in order to obtain real-time performance. The algorithm implemented was a Harris Feature Detector combined with a correlator based on a priority queue of feature strengths that considered minimum distances between features. The remaining processing of frame to frame movement is completed in software to determine an affine homography including translation, rotation, and scaling. A RANSAC method is used to remove mismatched features and increase accuracy. This implementation was designed specifically for use as an onboard vision solution in determining movement of small unmanned air vehicles that have size, weight, and power limitations.

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Authors and Affiliations

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George Bebis Richard Boyle Bahram Parvin Darko Koracin Nikos Paragios Syeda-Mahmood Tanveer Tao Ju Zicheng Liu Sabine Coquillart Carolina Cruz-Neira Torsten Müller Tom Malzbender

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© 2007 Springer-Verlag Berlin Heidelberg

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Tippetts, B., Fowers, S., Lillywhite, K., Lee, DJ., Archibald, J. (2007). FPGA Implementation of a Feature Detection and Tracking Algorithm for Real-time Applications. In: Bebis, G., et al. Advances in Visual Computing. ISVC 2007. Lecture Notes in Computer Science, vol 4841. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-76858-6_66

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  • DOI: https://doi.org/10.1007/978-3-540-76858-6_66

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-76857-9

  • Online ISBN: 978-3-540-76858-6

  • eBook Packages: Computer ScienceComputer Science (R0)

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