Abstract
Network-on-chip (NoC) are considered the next generation of communication infrastructure for a multiprocessors system-on-chip (MPSoCs). In the platform-based methodology, an application is implemented by a set of collaborating intellectual properties (IPs) blocks. In this paper, we use NSGA-II and microGA to yield efficient topological pre-selected sets IPs on the tiles of a mesh-based NoC. Each IP is associated with a processor that best implements its functionality. The IP mapping optimization is driven by the area occupied, execution time and power consumption.
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da Silva, M.V.C., Nedjah, N., de Macedo Mourelle, L. (2009). Application Synthesis for MPSoCs Implementation Using Multiobjective Optimization. In: Cabestany, J., Sandoval, F., Prieto, A., Corchado, J.M. (eds) Bio-Inspired Systems: Computational and Ambient Intelligence. IWANN 2009. Lecture Notes in Computer Science, vol 5517. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-02478-8_92
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DOI: https://doi.org/10.1007/978-3-642-02478-8_92
Publisher Name: Springer, Berlin, Heidelberg
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