Abstract
In this paper we report preliminary results of experiments with finding efficient circuits (over binary bases) using SAT-solvers. We present upper bounds for functions with constant number of inputs as well as general upper bounds that were found automatically. We focus mainly on MOD-functions. Besides theoretical interest, these functions are also interesting from a practical point of view as they are the core of the residue number system. In particular, we present a circuit of size 3n + c over the full binary basis computing \({\rm MOD}_3^n\).
The first two authors are supported in part by RFBR (grant 08-01-00640-a) and RAS Program for Fundamental Research (”Modern Problems of Theoretical Mathematics”).
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References
Chin, A.: On the depth complexity of the counting functions. Information Processing Letters 35, 325–328 (1990)
Eén, N.: Practical SAT — a tutorial on applied satisfiability solving. Slides of invited talk at FMCAD (2007)
Estrada, G.G.: A note on designing logical circuits using SAT. In: Tyrrell, A.M., Haddow, P.C., Torresen, J. (eds.) ICES 2003. LNCS, vol. 2606, pp. 410–421. Springer, Heidelberg (2003)
Fischer, M.J., Meyer, A.R., Paterson, M.S.: Ω(n logn) lower bounds on length of Boolean formulas. SIAM Journal on Computing 11, 416–427 (1982)
Fogel, D.B.: Evolutionary computation: The fossil record. IEEE Press, New York (1998)
Kamath, A.P., Karmarkar, N.K., Ramakrishnan, K.G., Resende, M.G.C.: An interior point approach to boolean vector function synthesis. In: Proceedings of the 36th International Midwest Symposium on Circuits and Systems (MSCAS 1993), pp. 185–189 (1993)
Khatri, S., Shenoy, N.: Logic synthesis. In: Scheffer, L., Lavagno, L., Martin, G. (eds.) Electronic Design Automation For Integrated Circuits Handbook. CRC Press, Taylor & Francis Group (2006)
Khrapchenko, V.M.: Complexity of the realization of a linear function in the case of Π-circuits. Math. Notes Acad. Sciences 9, 21–23 (1971)
Koren, I.: Computer Arithmetic Algorithms. Prentice Hall, Englewood Cliffs (1993)
Lee, C.Y.: Representation of switching circuits by binary-decision programs. Bell Systems Technical Journal 38, 985–999 (1959)
Massey, J.L.: The difficulty with difficulty. In: A Guide to the Transparencies from the EUROCRYPT 1996 IACR Distinguished Lecture (1996)
McCluskey, E.J.: Logic Design Principles: with emphasis on testable semicustom circuits. Prentice-Hall, Englewood Cliffs (1986)
Nigmatullin, R.G.: Slognost’ bulevikh funktsii. Moskva, Nauka (1991) (in Russian)
Paterson, M.S., Zwick, U.: Shallow circuits and concise formulae for multiple addition and multiplication. Computational Complexity 3, 262–291 (1993)
Prasad, M.R., Biere, A., Aarti, G.: A survey of recent advances in SAT-based formal verification. International Journal on Software Tools for Technology Transfer 7(2), 156–173 (2005)
Razborov, A.A.: Lower bounds for the monotone complexity of some Boolean functions. Soviet Math. Doklady 31, 354–357 (1985)
Gelatt, C.D., Kirkpatrick, S., Vecchi, M.P.: Optimization by simulated annealing. Science, New Series 220(4598), 671–680 (1983)
Schnorr, C.: Zwei lineare untere Schranken für die Komplexität Boolescher Funktionen. Computing 13, 155–171 (1974)
Stockmeyer, L.J.: On the combinational complexity of certain symmetric Boolean functions. Mathematical Systems Theory 10, 323–336 (1977)
van Leijenhorst, D.C.: A note on the formula size of the “mod k” functions. Information Processing Letters 24, 223–224 (1987)
Williams, R.: Applying practice to theory. ACM SIGACT News 39(4), 37–52 (2008)
Zwick, U.: A 4n lower bound on the combinational complexity of certain symmetric boolean functions over the basis of unate dyadic Boolean functions. SIAM Journal on Computing 20, 499–505 (1991)
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Kojevnikov, A., Kulikov, A.S., Yaroslavtsev, G. (2009). Finding Efficient Circuits Using SAT-Solvers . In: Kullmann, O. (eds) Theory and Applications of Satisfiability Testing - SAT 2009. SAT 2009. Lecture Notes in Computer Science, vol 5584. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-02777-2_5
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DOI: https://doi.org/10.1007/978-3-642-02777-2_5
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