Abstract
The verification and validation requirements set on high-integrity real-time systems demand the provision of highly dependable figures for the timing behavior of applications. It is a well known fact that the adoption of hardware acceleration features such as caches may affect both the safeness and the tightness of timing analysis. In this paper we discuss how the industrial development process may gain control over the unpredictability of cache behavior and its negative effect on the timing analyzability of software programs. We outline a comprehensive approach to cache-aware development by both focusing on the application code and by exploiting specific compile-time and run-time support to control cache utilization.
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Mezzetti, E., Betts, A., Ruiz, J., Vardanega, T. (2010). Cache-Aware Development of High-Integrity Systems. In: Real, J., Vardanega, T. (eds) Reliable Software Technologiey – Ada-Europe 2010. Ada-Europe 2010. Lecture Notes in Computer Science, vol 6106. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-13550-7_10
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DOI: https://doi.org/10.1007/978-3-642-13550-7_10
Publisher Name: Springer, Berlin, Heidelberg
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