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Accurate Floating Point Arithmetic through Hardware Error-Free Transformations

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Reconfigurable Computing: Architectures, Tools and Applications (ARC 2011)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 6578))

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Abstract

This paper presents a hardware approach to performing accurate floating point addition and multiplication using the idea of error-free transformations. Specialized iterative algorithms are implemented for computing arbitrarily accurate sums and dot products. The results of a Xilinx Virtex 6 implementation are given, area and performance are compared against standard floating point units and it is shown that the timeƗarea product can be improved by a factor of 4 and 6 over software error-free addition and multiplication. Furthermore, it is illustrated that a number of area and performance trade-offs can be made when calculating vector sums and dot products.

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Manoukian, M.V., Constantinides, G.A. (2011). Accurate Floating Point Arithmetic through Hardware Error-Free Transformations. In: Koch, A., Krishnamurthy, R., McAllister, J., Woods, R., El-Ghazawi, T. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2011. Lecture Notes in Computer Science, vol 6578. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19475-7_11

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  • DOI: https://doi.org/10.1007/978-3-642-19475-7_11

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-19474-0

  • Online ISBN: 978-3-642-19475-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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