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Impact of Dummy Poly on the Process-Induced Mechanical Stress Enhanced Circuit Performance

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Progress in VLSI Design and Test

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 7373))

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Abstract

In this work we studied the impacts of number of fingers in strain engineered MFGSs on the circuit performance designed using multi-finger gate structures (MFGSs) for three different layout scenarios. We studied the stress induced in the channel of MFGSs by decoupling different stress sources and dependence of channel stress on the layout of gate structures. Stress induced by shallow trench isolation (STI) and tensile/compressive etch stop liner (t/c-ESL) decreases with increase in the number of fingers (NF); whereas, eSiGe/eSiC stress increases with increasing number of fingers. Stress from different sources are additive in nature and overall stress profile is the resultant of stress from all the sources. We observed that the use of dummy poly reduces the LDE of variability due to stress, though, at the cost of increased area.

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References

  1. Alam, N., Anand, B., Dasgupta, S.: Process induced mechanical stress aware poly-pitch optimization for enhanced circuit performance. In: IEEE ISQED, pp. 717–722 (2012)

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© 2012 Springer-Verlag Berlin Heidelberg

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Alam, N., Anand, B., Dasgupta, S. (2012). Impact of Dummy Poly on the Process-Induced Mechanical Stress Enhanced Circuit Performance. In: Rahaman, H., Chattopadhyay, S., Chattopadhyay, S. (eds) Progress in VLSI Design and Test. Lecture Notes in Computer Science, vol 7373. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-31494-0_43

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  • DOI: https://doi.org/10.1007/978-3-642-31494-0_43

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-31493-3

  • Online ISBN: 978-3-642-31494-0

  • eBook Packages: Computer ScienceComputer Science (R0)

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