Abstract
A new data-flow processor UPD7281 is the base of an image processing board for standard PCs. All parts needed are implemented. An input multiplexer selects one of 16 CCIR sources (camera or VTR) with either internal or external synchronization. This signal is converted to digital with an 8 bit flash-converter and can be manipulated by an input look-up-table. Four image memory planes are available with each 512*512*8bit. Three analog composite video outputs with output lookup-tables allow false color representation of the selected memory plane. Four data-flow processors and a chip for memory and host interface provide a speed up to 20 MIPS. All functional blocks are accessed via the host PC bus. An internal bus transfers the data between memory and dataflow processors to avoid any performance degradation. The programming technique for the dataflow processors will be explained in detail.
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© 1987 Springer-Verlag Berlin Heidelberg
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Baston, J. (1987). Bildverarbeitung mit Datenflussrechnern. In: Meyer-Ebrecht, D. (eds) ASST ’87 6. Aachener Symposium für Signaltheorie. Informatik-Fachberichte, vol 153. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-73015-3_49
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DOI: https://doi.org/10.1007/978-3-642-73015-3_49
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-18401-0
Online ISBN: 978-3-642-73015-3
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