Skip to main content

Asynchronous Interlock Units for Speed-Independent Multiprocessor Systems

  • Conference paper
GI — 6. Jahrestagung

Part of the book series: Informatik — Fachberichte ((INFORMATIK,volume 5))

Abstract

In a hardware asynchronous parallel system, two or more processors may require simultaneously the use of a common functional unit, and conflicts may arise. In order to resolve these conflicts, an interlock unit is employed. Two asynchronous interlock units that can be used in asynchronous speed-independent systems are presented in this paper. Both interlock units have high modularity. They differ in the priority rule, according to which (if there are several requests) the common functional unit is assigned.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 54.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 69.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. E.W. Dijkstra, Solution of a problem in concurrent programming control, Comm. of the ACM, Vol. 8, p. 569, September 1965.

    Article  Google Scholar 

  2. J.B. Dennis and E.C. Van Horn, Programming semantics for multiprogrammed computations, Comm. of the ACM, Vol. 9, pp. 143–155, March 1966.

    Article  MATH  Google Scholar 

  3. D.E. Knuth, Additional comments on a problem in concurrent programming control, Comm. of the ACM, Vol. 9, pp. 321–322, May 1966.

    Article  Google Scholar 

  4. S.M. Ornestein, M.J. Stucki and W.A. Clark, A functional description of macromodules, AFIPS Conference Proceedings, Vol. 30, pp. 337–355, Spring 1967.

    Google Scholar 

  5. N. Wirth, A note on “program structures for parallel processing”, Comm. of the ACM, Vol. 9, pp. 320–321, May 1966.

    Article  Google Scholar 

  6. T.H, Bredt and E.J. McCluskey, Analysis and synthesis of control mechanisms for parallel processes, in Parallel Processor Systems, Technologies and Applications, L.C. Hobbs et al. (Eds.), Spartan, New York, pp. 287–295, 1970.

    Google Scholar 

  7. J.B. Dennis and S.S. Patil, Speed independent asynchronous circuits, Fourth Hawaii Int. Conf. on System Sciences, pp. 55–58, January 1971.

    Google Scholar 

  8. S.S. Patil and J.B. Dennis, The description and realization of digital systems, Sixth Annual IEEE Computer Society Int. Conf., pp. 223–226, September 1971.

    Google Scholar 

  9. R.M. Keller, Towards a theory of universal speed-independent modules, IEEE Trans. Comput., Vol. C-23, pp. 21–23, January 1974.

    Article  Google Scholar 

  10. W.W. Plummer, Asynchronous arbiters, IEEE Trans. Comput., Vol. C-21, pp. 37–42, January 1972.

    Article  Google Scholar 

  11. P. Corsini, Self-synchronizing asynchronous arbiter, Digital Processes, Vol. 1, pp. 67–73, 1975.

    MATH  Google Scholar 

  12. M.I.T. Project MAC Progress Report X, pp. 24–27, July 1973.

    Google Scholar 

  13. S.S. Patil, Bounded and unbounded delay synchronizers and arbiters, Computation Structures Group Memo 103, Project MAC, M.I.T., June 1974.

    Google Scholar 

  14. P.E. Wood, Switching theory, McGraw-Hill Book Company, New York, 1968.

    MATH  Google Scholar 

  15. T.J. Chaney and C.E. Molnar, Anomalous behaviour of synchronizer and arbiter circuits, IEEE Trans. Comput., Vol. C-22, pp. 421–422, April 1973.

    Article  Google Scholar 

  16. I. Catt, Time loss through gatin of asynchronous logic signal pulses, IEEE Trans. Comput., Vol. EC-15, pp. 108–111, February 1966.

    Article  Google Scholar 

  17. G.R. Couranz and D.F. Wann, Theoretical and experimental behaviour of synchronizers operating in the metastable region, IEEE Trans. Comput., Vol, C-24, pp. 604–616, June 1975.

    Article  Google Scholar 

  18. D.E. Muller and W.S. Bartky, A theory of asynchronous circuits, Proceedings of an Int. Symp. on the Theory of Switching, pp. 204–243, Harvard University Press 1959.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 1976 Springer-Verlag Berlin · Heidelberg

About this paper

Cite this paper

Corsini, P. (1976). Asynchronous Interlock Units for Speed-Independent Multiprocessor Systems. In: Neuhold, E.J. (eds) GI — 6. Jahrestagung. Informatik — Fachberichte, vol 5. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-95289-0_33

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-95289-0_33

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-07912-5

  • Online ISBN: 978-3-642-95289-0

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics