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Comparative Analysis of MCML Compressor with and Without Concept of Sleep Transistor

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Proceedings of International Conference on ICT for Sustainable Development

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 408))

Abstract

In this paper, an analysis of different compressors is done with and without the concept of sleep transistor. In VLSI design, compressor is an important part of multiplier as these are used to reduce the space equipped by partial products as the maximum space in a multiplication process is taken by partial products. The compressor architecture given are exclusively based on combination of three-level MCML gate with the concept of sleep transistor as these are generally suitable for improvement in speed, power consumption, and area the concept of sleep transistor is useful in reducing the leakage current. 16 nm, CMOS technology were used for designing using Tanner EDA 14.1 version of these compressor this results in up to 40 % reduction of power consumption.

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Correspondence to Keerti Vyas .

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© 2016 Springer Science+Business Media Singapore

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Vyas, K., Jain, G., Maurya, V.K., Mehra, A. (2016). Comparative Analysis of MCML Compressor with and Without Concept of Sleep Transistor. In: Satapathy, S., Joshi, A., Modi, N., Pathak, N. (eds) Proceedings of International Conference on ICT for Sustainable Development. Advances in Intelligent Systems and Computing, vol 408. Springer, Singapore. https://doi.org/10.1007/978-981-10-0129-1_27

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  • DOI: https://doi.org/10.1007/978-981-10-0129-1_27

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-10-0127-7

  • Online ISBN: 978-981-10-0129-1

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